Searched refs:f_min (Results 1 - 25 of 33) sorted by relevance
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| /u-boot/drivers/mmc/ |
| H A D | piton_mmc.c | 82 cfg->f_min = PITON_MMC_DUMMY_F_MIN;
139 cfg->f_min = PITON_MMC_DUMMY_F_MIN;
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| H A D | davinci_mmc.c | 53 if (clock < mmc->cfg->f_min)
54 clock = mmc->cfg->f_min;
464 host->cfg.f_min = 200000;
510 cfg->f_min = 200000;
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| H A D | sdhci.c | 868 u32 f_max, u32 f_min)
964 if (f_min)
965 cfg->f_min = f_min;
968 cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
970 cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
1040 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min) argument
1044 ret = sdhci_setup_cfg(&host->cfg, host, f_max, f_min);
867 sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, u32 f_max, u32 f_min) argument
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| H A D | mmc_legacy.c | 174 if (cfg == NULL || cfg->f_min == 0 ||
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| H A D | f_sdh30.c | 82 mmc_set_clock(host->mmc, host->mmc->cfg->f_min, MMC_CLK_ENABLE);
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| H A D | meson_gx_mmc.c | 281 cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
289 mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
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| H A D | jz_mmc.c | 403 .f_min = 375000,
466 cfg->f_min = 400000;
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| H A D | sandbox_mmc.c | 218 cfg->f_min = 1000000;
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| H A D | mtk-sd.c | 969 else if (clock < mmc->cfg->f_min)
970 clock = mmc->cfg->f_min;
1657 cfg->f_min = host->src_clk_freq / (4 * 255);
1659 cfg->f_min = host->src_clk_freq / (4 * 4095);
1661 if (cfg->f_min < MIN_BUS_CLK)
1662 cfg->f_min = MIN_BUS_CLK;
1664 if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
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| H A D | arm_pl180_mmci.c | 410 cfg->f_min = host->clock_in / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
424 cfg->f_min = host->clock_in / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
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| H A D | dw_mmc.c | 545 dwmci_setup_bus(host, mmc->cfg->f_min);
602 cfg->f_min = min_clk;
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| H A D | gen_atmel_mci.c | 504 cfg->f_min = get_mci_clk_rate() / (2*256);
550 cfg->f_min = priv->bus_clk_rate / (2 * 256);
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| H A D | mxsmmc.c | 203 priv->cfg.f_min = 400000;
627 plat->cfg.f_min = 400000;
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| H A D | sunxi_mmc.c | 544 cfg->f_min = 400000;
651 cfg->f_min = 400000;
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| H A D | sh_mmcif.c | 629 sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk);
727 plat->cfg.f_min = MMC_CLK_DIV_MIN(host->clk);
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| H A D | fsl_esdhc.c | 509 if (clock < mmc->cfg->f_min)
510 clock = mmc->cfg->f_min;
837 cfg->f_min = 400000;
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| H A D | fsl_esdhc_imx.c | 935 if (clock < mmc->cfg->f_min)
936 clock = mmc->cfg->f_min;
1232 cfg->f_min = 400000;
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| H A D | ftsdc010_mci.c | 376 cfg->f_min = min_clk;
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| H A D | mmc_spi.c | 470 plat->cfg.f_min = MMC_SPI_MIN_CLOCK;
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| H A D | mxcmmc.c | 511 mxcmci_cfg.f_min = mxc_get_clock(MXC_ESDHC_CLK) >> 7;
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| H A D | mvebu_mmc.c | 453 cfg->f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX;
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| H A D | owl_mmc.c | 352 cfg->f_min = 400000;
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| /u-boot/include/ |
| H A D | sdhci.h | 480 * @f_min: Minimum supported clock frequency in HZ (0 for default)
483 u32 f_max, u32 f_min);
510 * @f_min: Minimum supported clock frequency in HZ (0 for default)
513 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min);
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| /u-boot/board/davinci/da8xxevm/ |
| H A D | omapl138_lcdk.c | 332 .f_min = 200000,
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| /u-boot/board/ti/am335x/ |
| H A D | board.c | 989 .cfg.f_min = 400000,
1003 .cfg.f_min = 400000,
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