Searched refs:dpll_cfg (Results 1 - 6 of 6) sorted by relevance

/u-boot/drivers/clk/rockchip/
H A Dclk_rk322x.c326 struct pll_div dpll_cfg; local
331 dpll_cfg = (struct pll_div)
335 dpll_cfg = (struct pll_div)
339 dpll_cfg = (struct pll_div)
347 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg);
H A Dclk_rk3368.c289 const struct pll_div *dpll_cfg = NULL; local
299 dpll_cfg = &dpll_1200;
302 dpll_cfg = &dpll_1332;
305 dpll_cfg = &dpll_1600;
310 rkclk_set_pll(cru, DPLL, dpll_cfg);
H A Dclk_rk3399.c850 struct pll_div dpll_cfg; local
858 dpll_cfg = (struct pll_div)
862 dpll_cfg = (struct pll_div)
866 dpll_cfg = (struct pll_div)
870 dpll_cfg = (struct pll_div)
874 dpll_cfg = (struct pll_div)
878 dpll_cfg = (struct pll_div)
882 dpll_cfg = (struct pll_div)
888 rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg);
H A Dclk_rk3066.c118 static const struct pll_div dpll_cfg[] = { local
148 rk3066_clk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg]);
H A Dclk_rk3188.c126 static const struct pll_div dpll_cfg[] = { local
156 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg], has_bwadj);
H A Dclk_rk3288.c184 static const struct pll_div dpll_cfg[] = { local
214 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg]);

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