Searched refs:div64_u64 (Results 1 - 8 of 8) sorted by relevance

/u-boot/lib/
H A Ddiv64.c96 * This implementation is a comparable to algorithm used by div64_u64.
98 * is kept distinct to avoid slowing down the div64_u64 operation on 32bit
131 * div64_u64 - unsigned 64bit divide with 64bit divisor
141 #ifndef div64_u64
142 u64 div64_u64(u64 dividend, u64 divisor) function
161 EXPORT_SYMBOL(div64_u64); variable
174 quot = div64_u64(abs(dividend), abs(divisor));
/u-boot/include/linux/
H A Dmath64.h11 #define div64_ul(x, y) div64_u64((x), (y))
44 * div64_u64 - unsigned 64bit divide with 64bit divisor
46 static inline u64 div64_u64(u64 dividend, u64 divisor) function
52 ({ u64 _tmp = (d); div64_u64((ll) + _tmp - 1, _tmp); })
83 #ifndef div64_u64
84 extern u64 div64_u64(u64 dividend, u64 divisor);
/u-boot/drivers/pwm/
H A Dpwm-aspeed.c135 div_h = order_base_2(div64_u64((u64)rate * period_ns + divisor - 1, divisor));
140 div_l = div64_u64((u64)rate * period_ns, divisor);
153 duty_pt = div64_u64(duty_ns * (u64)rate,
H A Dpwm-cadence-ttc.c102 period_clocks = div64_u64(((int64_t)period_ns * priv->frequency),
125 duty_clocks = div64_u64(((int64_t)duty_ns * priv->frequency),
H A Dpwm-meson.c130 pre_div = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * 0xffffLL);
136 cnt = div64_u64(fin_freq * (u64)period, NSEC_PER_SEC * (pre_div + 1));
154 duty_cnt = div64_u64(fin_freq * (u64)duty, NSEC_PER_SEC * (pre_div + 1));
/u-boot/drivers/clk/analogbits/
H A Dwrpll-cln28hpc.c262 ratio = div64_u64((target_vco_rate << ROUND_SHIFT), parent_rate);
/u-boot/drivers/clk/
H A Dclk_versaclock.c464 return div64_u64((u64)f_in << 24ULL, ((u64)div_int << 24ULL) + div_frc);
500 return div64_u64((u64)f_in << 24ULL, ((u64)div_int << 24ULL) + div_frc);
/u-boot/drivers/usb/dwc3/
H A Dcore.c170 fladj = div64_u64(125000ULL * NSEC_PER_SEC, (u64)rate * period);

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