| /u-boot/drivers/ram/octeon/ |
| H A D | dimm_spd_eeprom.c | 193 debug("Validating dimm %d, spd addr: 0x%02x spd ptr: %p\n",
222 return 0; /* Failed to read dimm */
248 return 0; /* Failed to read dimm */
272 return 0; /* Failed to read dimm */
327 int dimm, const char **dimm_types, int ddr_type,
341 if_num, dimm, ddr_type, dimm_types[spd_module_type],
346 int dimm, int if_num)
364 report_common_dimm(dimm_config, upper_dimm, dimm, ddr3_dimm_types,
370 int dimm, int if_num)
390 report_common_dimm(dimm_config, upper_dimm, dimm, ddr4_dimm_type
326 report_common_dimm(struct dimm_config *dimm_config, int upper_dimm, int dimm, const char **dimm_types, int ddr_type, char *volt_str, int if_num, int num_ranks, int dram_width, int spd_package) argument
345 report_ddr3_dimm(struct dimm_config *dimm_config, int upper_dimm, int dimm, int if_num) argument
369 report_ddr4_dimm(struct dimm_config *dimm_config, int upper_dimm, int dimm, int if_num) argument
395 report_dimm(struct dimm_config *dimm_config, int upper_dimm, int dimm, int if_num) argument
[all...] |
| H A D | octeon3_lmc.c | 6674 * Registered dimm topology routes
6706 * Unbuffered dimm topology routes
9040 * Quad rank dimm capacity is equivalent to two dual-rank
9048 * per dimm. This makes later calculations simpler, as a variety
9793 int *node, int *lmc, int *dimm,
9857 *dimm = EXTRACT(address, dimm_lsb, dimm_width);
9895 int node_address, lmc, dimm; local
9965 cvmx_dram_address_extract_info(priv, p, &node_address, &lmc, &dimm,
9968 __func__, p, node_address, lmc, dimm, prank, lrank, bank,
10008 &dimm,
9792 cvmx_dram_address_extract_info(struct ddr_priv *priv, u64 address, int *node, int *lmc, int *dimm, int *prank, int *lrank, int *bank, int *row, int *col) argument
[all...] |
| /u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_spd.c | 183 u32 dimm);
198 * Args: dimm_addr - array of dimm addresses
209 /* Read the dimm eeprom */
518 int ddr3_spd_sum_init(MV_DIMM_INFO *info, MV_DIMM_INFO *sum_info, u32 dimm) argument
520 if (dimm == 0) {
597 __maybe_unused u32 dimm_cnt, cs_count, dimm; local
637 for (dimm = 0; dimm < dimm_num; dimm++) {
638 status = ddr3_spd_init(&dimm_info[dimm], dimm_add
[all...] |
| /u-boot/drivers/ddr/fsl/ |
| H A D | options.c | 922 * check first dimm for primary sdram width
1068 * due to ddr3 dimm is fly-by topology
1331 struct dimm_params_s *dimm; local
1347 dimm = &pinfo->dimm_params[i][0];
1350 } else if (((check_rank_density != dimm->rank_density) ||
1351 (check_n_ranks != dimm->n_ranks) ||
1352 (check_n_row_addr != dimm->n_row_addr) ||
1353 (check_n_col_addr != dimm->n_col_addr) ||
|
| H A D | interactive.c | 1815 #define DATA_OPTIONS(name, step, dimm) {#name, step, dimm}
2289 /* If no particular dimm was found, print all dimms. */
|
| /u-boot/arch/x86/include/asm/ |
| H A D | global_data.h | 42 /* Maximum num of dimm is 8 */
43 struct dimm_info dimm[8]; member in struct:pei_memory_info
|
| /u-boot/arch/mips/mach-octeon/include/mach/ |
| H A D | octeon_ddr.h | 497 * .parity: The parity input signal PAR_IN on each dimm must be
732 int dimm, int if_num);
|