Searched refs:data_rate (Results 1 - 6 of 6) sorted by relevance

/u-boot/drivers/video/
H A Danx9804.h19 void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp);
21 static inline void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, argument
H A Danx9804.c25 * @data_rate: Register value for the bandwidth reg 0x06: 1.62G, 0x0a: 2.7G
28 void anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp)
108 dm_i2c_reg_write(chip0, ANX9804_LINK_BW_SET_REG, data_rate);
29 anx9804_init(struct udevice *i2c_bus, u8 lanes, u8 data_rate, int bpp) argument
/u-boot/drivers/ddr/fsl/
H A Dutil.c75 unsigned int data_rate = get_ddr_freq(ctrl_num);
80 if (data_rate) {
82 rem = do_div(mclk_ps, data_rate);
83 result = (rem >= (data_rate >> 1)) ? mclk_ps + 1 : mclk_ps;
95 unsigned long data_rate = get_ddr_freq(ctrl_num);
102 clks = picos * (unsigned long long)data_rate;
112 if (clks_rem > data_rate)
74 unsigned int data_rate = get_ddr_freq(ctrl_num); local
94 unsigned long data_rate = get_ddr_freq(ctrl_num); local
H A Dctrl_regs.c323 unsigned int data_rate = get_ddr_freq(ctrl_num);
326 trwt_mclk = (data_rate/1000000 > 1900) ? 3 : 2;
353 unsigned int data_rate = get_ddr_freq(ctrl_num);
409 trwt_mclk = (data_rate/1000000 > 1800) ? 2 : 1;
411 if ((data_rate/1000000 > 1150) || (popts->memctl_interleaving))
322 unsigned int data_rate = get_ddr_freq(ctrl_num); local
352 unsigned int data_rate = get_ddr_freq(ctrl_num); local
/u-boot/drivers/video/bridge/
H A Danx6345.c271 u8 chipid, colordepth, lanes, data_rate, c;
353 if (anx6345_read_dpcd(dev, DP_MAX_LINK_RATE, &data_rate)) {
357 debug("%s: data_rate: %d\n", __func__, (int)data_rate);
366 anx6345_write_r0(dev, ANX9804_LINK_BW_SET_REG, data_rate);
272 u8 chipid, colordepth, lanes, data_rate, c; local
/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-ilk-defs.h1906 u64 data_rate : 13; member in struct:cvmx_ilk_txx_dbg::cvmx_ilk_txx_dbg_s

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