Searched refs:ctrl_core_sma_sw_0 (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c37 clrsetbits_le32((*ctrl)->ctrl_core_sma_sw_0, CTRL_ISOLATE_MASK,
40 readl((*ctrl)->ctrl_core_sma_sw_0);
208 if (readl((*ctrl)->ctrl_core_sma_sw_0) & CTRL_ISOLATE_MASK)
H A Dprcm-regs.c385 .ctrl_core_sma_sw_0 = 0x4A0023FC,
1028 (*ctrl)->ctrl_core_sma_sw_0;
/u-boot/arch/arm/include/asm/
H A Domap_common.h489 u32 ctrl_core_sma_sw_0; member in struct:omap_sys_ctrl_regs

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