| /u-boot/arch/x86/cpu/ |
| H A D | start16.S | 27 movl %cr0, %eax
29 movl %eax, %cr0
37 movl %cr0, %eax
39 movl %eax, %cr0
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| H A D | call32.S | 41 movl %cr0, %eax
43 movl %eax, %cr0
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| H A D | wakeup.S | 49 movl %cr0, %eax
51 movl %eax, %cr0
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| H A D | sipi_vector.S | 51 movl %cr0, %eax
55 movl %eax, %cr0
185 mov %cr0, %eax
187 mov %eax, %cr0
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| H A D | start.S | 49 movl %cr0, %eax
51 movl %eax, %cr0
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| /u-boot/arch/x86/cpu/intel_common/ |
| H A D | car.S | 102 movl %cr0, %eax
105 movl %eax, %cr0
129 movl %cr0, %eax
131 movl %eax, %cr0
161 movl %cr0, %eax
163 movl %eax, %cr0
179 movl %cr0, %eax
181 movl %eax, %cr0
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| H A D | car2.S | 158 mov %cr0, %eax
161 mov %eax, %cr0
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| /u-boot/arch/x86/cpu/i386/ |
| H A D | cpu.c | 365 "movl %%cr0, %%eax\n" \
368 "movl %%eax, %%cr0\n" \
498 unsigned long cr0; local
500 cr0 = read_cr0();
501 cr0 &= ~(X86_CR0_NW | X86_CR0_CD);
502 write_cr0(cr0);
509 unsigned long cr0; local
511 cr0 = read_cr0();
512 cr0 |= X86_CR0_NW | X86_CR0_CD;
514 write_cr0(cr0);
[all...] |
| H A D | call64.S | 71 movl %eax, %cr0
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| H A D | interrupt.c | 89 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; local
132 cr0 = read_cr0();
138 cr0, cr2, cr3, cr4);
|
| /u-boot/arch/x86/lib/ |
| H A D | bios_asm.S | 65 movl %cr0, %eax
67 movl %eax, %cr0
113 movl %cr0, %eax
115 movl %eax, %cr0
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| /u-boot/drivers/spi/ |
| H A D | designware_spi.c | 504 u32 cr0 = 0; local
529 cr0 = priv->update_cr0(priv);
541 dev_dbg(dev, "cr0=%08x rx=%p tx=%p len=%d [bytes]\n", cr0, rx, tx,
543 /* Reprogram cr0 only if changed */
544 if (dw_read(priv, DW_SPI_CTRLR0) != cr0)
545 dw_write(priv, DW_SPI_CTRLR0, cr0);
593 u32 cr0, sts; local
600 cr0 = priv->update_cr0(priv);
601 dev_dbg(bus, "cr0
[all...] |
| H A D | pl022_spi.c | 246 u16 scr = SSP_SCR_MIN, cr0 = 0, cpsr = SSP_CPSR_MIN, best_scr = scr, local
283 cr0 = readw(ps->base + SSP_CR0);
284 writew(cr0 | (best_scr << SSP_SCR_SHFT), ps->base + SSP_CR0);
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| /u-boot/arch/m68k/include/asm/coldfire/ |
| H A D | pwm.h | 15 u8 cr0; member in struct:pwm_ctrl
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| /u-boot/arch/arm/mach-sunxi/ |
| H A D | rmr_switch.S | 42 mrc 15, 0, r0, cr12, cr0, 2 @ read RMR register
44 mcr 15, 0, r0, cr12, cr0, 2 @ write RMR register
|