#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5c39f2c1 |
|
13-Mar-2023 |
Troy Kisky <troykiskyboundary@gmail.com> |
x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI) This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI) Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> [Rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
4cb3b9f0 |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
x86: Simplify cpu_jump_to_64bit_uboot() This copies the cpu_call64() function to memory address and then jumps to it. This seems to work correctly even when called from SPL, which is running from SPI flash. Drop the copy as it is not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
92873f83 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs if previously done When starting U-Boot from a previous-stage bootloader we presumably don't need to set up the variable MTRRs. In fact this could be harmful if the existing settings are not what U-Boot uses. Skip that step in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5c39f2c1 |
|
13-Mar-2023 |
Troy Kisky <troykiskyboundary@gmail.com> |
x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI) This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI) Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> [Rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
4cb3b9f0 |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
x86: Simplify cpu_jump_to_64bit_uboot() This copies the cpu_call64() function to memory address and then jumps to it. This seems to work correctly even when called from SPL, which is running from SPI flash. Drop the copy as it is not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
92873f83 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs if previously done When starting U-Boot from a previous-stage bootloader we presumably don't need to set up the variable MTRRs. In fact this could be harmful if the existing settings are not what U-Boot uses. Skip that step in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5c39f2c1 |
|
13-Mar-2023 |
Troy Kisky <troykiskyboundary@gmail.com> |
x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI) This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI) Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> [Rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
4cb3b9f0 |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
x86: Simplify cpu_jump_to_64bit_uboot() This copies the cpu_call64() function to memory address and then jumps to it. This seems to work correctly even when called from SPL, which is running from SPI flash. Drop the copy as it is not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
92873f83 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs if previously done When starting U-Boot from a previous-stage bootloader we presumably don't need to set up the variable MTRRs. In fact this could be harmful if the existing settings are not what U-Boot uses. Skip that step in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
4cb3b9f0 |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
x86: Simplify cpu_jump_to_64bit_uboot() This copies the cpu_call64() function to memory address and then jumps to it. This seems to work correctly even when called from SPL, which is running from SPI flash. Drop the copy as it is not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
92873f83 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs if previously done When starting U-Boot from a previous-stage bootloader we presumably don't need to set up the variable MTRRs. In fact this could be harmful if the existing settings are not what U-Boot uses. Skip that step in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
92873f83 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs if previously done When starting U-Boot from a previous-stage bootloader we presumably don't need to set up the variable MTRRs. In fact this could be harmful if the existing settings are not what U-Boot uses. Skip that step in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
a0df9249 |
|
21-Dec-2020 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
x86: typo segement %s/segement/segment/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
aec7c1c5 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Report address width from cpu_get_info() Add support for this new field in the common code used by most x86 CPU drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
8bccbc5a |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Remove unnecessary #ifdefs Drop some #ifdefs that are not needed or can be converted to compile-time checks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
78d57d63 |
|
17-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move MP code into mp_init At present the 'flight plan' for CPUs is passed into mp_init. But it is always the same. Move it into the mp_init file so everything is in one place. Also drop the SMI function since it does nothing. If we implement SMIs, more refactoring will be needed anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9ef16867 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Store the coreboot table address in global_data At present this information is used to locate and parse the tables but is not stored. Store it so that we can display it to the user, e.g. with the 'bdinfo' command. Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(), so it is always set when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3dada5a1 |
|
02-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Reinit the FPU after FSP meminit The APL FSP appears to leave the FPU in a bad state in that it has registers in use. This causes an error when the next FPU operation is performed. Work around this by re-resetting the FPU after calling FSP-M. This allows the freetype console to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
37897c40 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move work-around out of cpu_jump_to_64bit_uboot() At present this function copies U-Boot from the last 1MB of ROM. This is not the right way to do it. Instead, the binman symbol should provide the location. But in any case the code should live in the caller, spl_board_load_image(), so that the 64-bit jump function can be used elsewhere. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ec0e7b6 |
|
30-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection to common 32/64-bit code At present this function is only available in 32-bit code. Move it to the common cpu file so it can be used by 64-bit U-Boot too. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
cfe7a106 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to detect running from coreboot If U-Boot is running from coreboot we need to skip low-level init. Add an way to detect this and to set the gd flag. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
33139a0b |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot-table detection into common code To support detecting booting from coreboot, move the code which locates the coreboot tables into a common place. Adjust the algorithm slightly to use a word comparison instead of string, since it is faster. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct the comments to 960KB] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
2fa863e9 |
|
08-Jan-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
x86: limit the fs segment to the pointer size The fs segment is only used to get the global data pointer. If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug. To specify the byte-granule limit size, drop the G bit, so the flag field is 0x8093 instead of 0xc093, and set the limit field to sizeof(new_gd->arch.gd_addr) - 1. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the comments about FS segement] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
35a3f871 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move ll_boot_init() to init.h This is an init-related function so belongs in that file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
caca13f6 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: Drop unnecessary cpu code for TPL We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9edefc27 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move some cache and MMU functions out of common.h These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
ece3a460 |
|
20-Oct-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a CPU init function for TPL For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c0069e9a |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Add a way to reinit the cpu We cannot init the CPU fully both than once during a boot. Add a new function which can be called to figure out the CPU identity, but which does not change anything. For x86_64, this is empty for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
bc1a8f0d |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Use the existing GDT in the ROM for 64-bit U-Boot proper It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
91683260 |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Don't copy the cpu_call64() function to a hardcoded address Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
dbb0696b |
|
31-Jan-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change 4-level page table base address to low memory At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
fa5fcb3b |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Support jumping from SPL to U-Boot Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot. This still needs work to clean it up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
be059e88 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|