/u-boot/arch/arm/mach-zynqmp-r5/ |
H A D | Makefile | 3 obj-y += cpu.o
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/u-boot/arch/arm/mach-npcm/npcm8xx/ |
H A D | Makefile | 1 obj-y += cpu.o reset.o
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/u-boot/arch/mips/mach-pic32/ |
H A D | Makefile | 7 obj-y = cpu.o lowlevel_init.o reset.
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/u-boot/arch/powerpc/ |
H A D | Makefile | 3 head-y := arch/powerpc/cpu/$(CPU)/start.o 4 head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o 6 libs-y += arch/powerpc/cpu/$(CPU)/ 7 libs-y += arch/powerpc/cpu/
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/u-boot/arch/arm/cpu/arm946es/ |
H A D | Makefile | 8 obj-y = cpu.o
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/u-boot/arch/arm/mach-mvebu/armada8k/ |
H A D | Makefile | 5 obj-y = cpu.o cache_llc.o dram.o
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/u-boot/arch/arm/mach-mvebu/alleycat5/ |
H A D | Makefile | 7 obj-y = cpu.o
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/u-boot/arch/arm/cpu/armv7/ |
H A D | psci-common.c | 30 void __secure psci_save(int cpu, u32 pc, u32 context_id) argument 32 psci_target_pc[cpu] = pc; 33 psci_context_id[cpu] = context_id; 37 u32 __secure psci_get_target_pc(int cpu) argument 39 return psci_target_pc[cpu]; 42 u32 __secure psci_get_context_id(int cpu) argument 44 return psci_context_id[cpu];
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/u-boot/arch/xtensa/ |
H A D | Makefile | 3 head-y := arch/xtensa/cpu/start.o 5 libs-y += arch/xtensa/cpu/
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/u-boot/arch/microblaze/ |
H A D | Makefile | 3 head-y := arch/microblaze/cpu/start.o 5 libs-y += arch/microblaze/cpu/
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/u-boot/arch/nios2/ |
H A D | Makefile | 3 head-y := arch/nios2/cpu/start.o 5 libs-y += arch/nios2/cpu/
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/u-boot/arch/riscv/cpu/generic/ |
H A D | Makefile | 6 obj-y += cpu.o
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/u-boot/arch/arm/mach-octeontx2/ |
H A D | Makefile | 8 obj-y += lowlevel_init.o clock.o cpu.o
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/u-boot/arch/arm/mach-octeontx/ |
H A D | Makefile | 8 obj-y += lowlevel_init.o clock.o cpu.o
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/u-boot/arch/arm/mach-npcm/npcm7xx/ |
H A D | Makefile | 1 obj-$(CONFIG_TARGET_POLEG) += cpu.o l2_cache_pl310_init.o l2_cache_pl310.o
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/u-boot/arch/arm/mach-versal-net/ |
H A D | Makefile | 10 obj-y += cpu.o
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/u-boot/arch/arm/mach-tegra/tegra114/ |
H A D | Makefile | 5 obj-$(CONFIG_SPL_BUILD) += cpu.o
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/u-boot/arch/arm/cpu/armv7/s5p4418/ |
H A D | Makefile | 8 obj-y += cpu.o
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/u-boot/arch/sh/cpu/sh4/ |
H A D | Makefile | 9 obj-y = cpu.o interrupts.o watchdog.o cache.o
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/u-boot/arch/xtensa/cpu/ |
H A D | Makefile | 6 obj-y = cpu.o exceptions.o
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/u-boot/arch/riscv/cpu/ |
H A D | Makefile | 7 obj-y += cpu.o mtrap.o
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/u-boot/arch/arm/cpu/arm720t/ |
H A D | Makefile | 7 obj-y = interrupts.o cpu.o
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/u-boot/arch/arm/mach-mvebu/armada3700/ |
H A D | Makefile | 5 obj-y = cpu.o mbox.o
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/u-boot/arch/arm/cpu/armv7/sunxi/ |
H A D | psci.c | 13 #include <asm/arch/cpu.h> 31 #define SUNXI_CPU_RST(cpu) (0x40 + (cpu) * 0x40 + 0x0) 32 #define SUNXI_CPU_STATUS(cpu) (0x40 + (cpu) * 0x40 + 0x8) 47 #define SUN8I_R40_PWR_CLAMP(cpu) (0x120 + (cpu) * 0x4) 122 static void __secure sunxi_cpu_set_entry(int __always_unused cpu, void *entry) argument 135 static void __secure sunxi_cpu_set_power(int cpu, bool on) argument 144 cpu 176 sunxi_cpu_set_reset(int cpu, bool reset) argument 192 sunxi_cpu_set_locking(int cpu, bool lock) argument 205 sunxi_cpu_poll_wfi(int cpu) argument 215 sunxi_cpu_invalidate_cache(int cpu) argument 228 u32 cpu = cpuid & 0x3; local 270 u32 scr, reg, cpu; local 301 u32 cpu = (mpidr & 0x3); local [all...] |
/u-boot/arch/arm/mach-imx/imx8m/ |
H A D | psci.c | 27 #define EN_Cn_WFI_PDN(cpu) BIT(((((cpu) & 1) * 2) + (((cpu) & 2) * 8))) 28 #define GPC_PGC_nCTRL(cpu) (0x800 + ((cpu) * 0x40)) 31 #define COREn_A53_SW_PUP_REQ(cpu) BIT(cpu) 52 __secure static void psci_set_state(int cpu, u8 state) argument 54 psci_state[cpu] = state; 59 __secure static s32 psci_cpu_on_validate_mpidr(u64 mpidr, u32 *cpu) argument 78 psci_cpu_on_write_entry_point(const u32 cpu, u64 entry_point) argument 92 psci_cpu_on_power_on(const u32 cpu) argument 113 psci_cpu_on_power_off(const u32 cpu) argument 134 u32 cpu = 0; local 155 u32 cpu = target_affinity & MPIDR_AFF0; local 193 u32 cpu = psci_get_cpu_id(); local [all...] |