Searched refs:control_status (Results 1 - 8 of 8) sorted by relevance

/u-boot/arch/arm/mach-omap2/am33xx/
H A Dprcm-regs.c13 .control_status = CTRL_BASE + 0x40,
/u-boot/arch/arm/mach-omap2/omap3/
H A Dprcm-regs.c13 .control_status = OMAP34XX_CTRL_BASE + 0x2F0,
/u-boot/arch/arm/mach-omap2/
H A Dsysinfo-common.c26 return (readl((*ctrl)->control_status) & DEVICE_TYPE_MASK) >>
/u-boot/arch/arm/mach-omap2/omap5/
H A Dboot.c39 sys_boot = readl((u32 *) (*ctrl)->control_status) & ((1 << 4) - 1);
H A Dprcm-regs.c298 .control_status = 0x4A002134,
382 .control_status = 0x4A002134,
/u-boot/arch/arm/mach-omap2/omap4/
H A Dboot.c54 sys_boot = readl((u32 *) (*ctrl)->control_status) & ((1 << 5) - 1);
H A Dprcm-regs.c282 .control_status = 0x4A0022C4,
288 .control_status = 0x4a0022c4,
/u-boot/arch/arm/include/asm/
H A Domap_common.h377 u32 control_status; member in struct:omap_sys_ctrl_regs

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