| /u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| H A D | clk-core.c | 84 struct peri_clk_data *cd = peri_clk->data; local
85 struct bcm_clk_gate *gate = &cd->gate;
108 reg = readl(base + cd->gate.offset);
109 reg |= (1 << cd->gate.en_bit);
110 writel(reg, base + cd->gate.offset);
114 if (divider_exists(&cd->div)) {
115 reg = readl(base + cd->div.offset);
116 bitfield_replace(reg, cd->div.shift, cd->div.width,
118 writel(reg, base + cd
169 struct peri_clk_data *cd = peri_clk->data; local
209 struct peri_clk_data *cd = peri_clk->data; local
339 struct bus_clk_data *cd = bus_clk->data; local
[all...] |
| /u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | clk-core.c | 84 struct peri_clk_data *cd = peri_clk->data; local
85 struct bcm_clk_gate *gate = &cd->gate;
108 reg = readl(base + cd->gate.offset);
109 reg |= (1 << cd->gate.en_bit);
110 writel(reg, base + cd->gate.offset);
114 if (divider_exists(&cd->div)) {
115 reg = readl(base + cd->div.offset);
116 bitfield_replace(reg, cd->div.shift, cd->div.width,
118 writel(reg, base + cd
169 struct peri_clk_data *cd = peri_clk->data; local
209 struct peri_clk_data *cd = peri_clk->data; local
339 struct bus_clk_data *cd = bus_clk->data; local
[all...] |
| /u-boot/post/lib_powerpc/ |
| H A D | b.c | 132 ulong cc, cd; local
141 for (cd = 0; cd < 4 && ret == 0; cd++)
149 int decr = cd < 2;
154 int jumpd = cd >= 2 ||
155 (cd == 0 && ctr != 1) ||
156 (cd == 1 && ctr == 1);
160 (cc << 3) + (cd << 1), 0, jump, decr, link,
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| H A D | cr.c | 67 ulong cd; member in struct:cpu_post_cr_s3
291 ASM_MCRF(test->cd, test->cs),
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| H A D | cpu_asm.h | 120 #define ASM_11C(opcode, cd, cs) ((opcode) + \
121 ((cd) << 23) + \
193 #define ASM_MCRF(cd, cs) ASM_11C(OP_MCRF, cd, cs)
|
| /u-boot/drivers/memory/ |
| H A D | ti-gpmc.c | 101 * @cd: Clock Domain.
106 static unsigned long gpmc_get_clk_period(int cs, enum gpmc_clk_domain cd) argument
112 switch (cd) {
129 enum gpmc_clk_domain cd)
134 tick_ps = gpmc_get_clk_period(cs, cd);
155 enum gpmc_clk_domain cd)
157 return ticks * gpmc_get_clk_period(cs, cd) / 1000;
203 * @cd: Clock Domain of timing parameter.
216 const char *name, const enum gpmc_clk_domain cd,
244 time_ns_min = gpmc_clk_ticks_to_ns(l - 1, cs, cd)
128 gpmc_ns_to_clk_ticks(unsigned int time_ns, int cs, enum gpmc_clk_domain cd) argument
154 gpmc_clk_ticks_to_ns(unsigned int ticks, int cs, enum gpmc_clk_domain cd) argument
214 get_gpmc_timing_reg( int cs, int reg, int st_bit, int end_bit, int max, const char *name, const enum gpmc_clk_domain cd, int shift, bool raw, bool noval) argument
388 set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int max, int time, enum gpmc_clk_domain cd, const char *name) argument
[all...] |
| /u-boot/arch/powerpc/cpu/mpc8xx/ |
| H A D | immap.c | 290 uint cd = (val & CPM_BRG_CD_MASK) >> 1; local
314 printf(" DIVIDER=%4d", cd);
315 if (extc == 0 && cd != 0) {
319 baudrate = (clock / 16) / (cd + 1);
321 baudrate = clock / (cd + 1);
|
| /u-boot/arch/arm/include/asm/arch-mxs/ |
| H A D | sys_proto.h | 15 int (*cd)(int));
|
| /u-boot/arch/sandbox/ |
| H A D | config.mk | 35 cmd_u-boot-spl = (cd $(obj) && $(CC) -o $(SPL_BIN) -Wl,-T u-boot-spl.lds \
|
| /u-boot/drivers/mmc/ |
| H A D | mxsmmc.c | 160 int (*cd)(int))
185 priv->mmc_cd = cd;
159 mxsmmc_initialize(struct bd_info *bis, int id, int (*wp)(int), int (*cd)(int)) argument
|
| H A D | mmc.c | 1293 int cd; local
1295 cd = board_mmc_getcd(mmc);
1297 if (cd < 0) {
1299 cd = mmc->cfg->ops->getcd(mmc);
1301 cd = 1;
1304 return cd;
|
| /u-boot/fs/ext4/ |
| H A D | ext4_common.c | 1663 struct ext_block_cache *c, cd; local
1671 c = &cd;
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| /u-boot/scripts/ |
| H A D | checkpatch.pl | 1120 my $status = `cd "$root_path"; echo "$license" | scripts/spdxcheck.py -`;
|