Searched refs:block_id (Results 1 - 17 of 17) sorted by relevance

/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-pcsx-defs.h12 static inline u64 CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) argument
18 return 0x00011800B0001010ull + ((offset) + (block_id) * 0x20000ull) * 1024;
20 return 0x00011800B0001010ull + ((offset) + (block_id) * 0x20000ull) * 1024;
23 return 0x00011800B0001010ull + ((offset) + (block_id) * 0x4000ull) * 1024;
25 return 0x00011800B0001010ull + ((offset) + (block_id) * 0x20000ull) * 1024;
28 static inline u64 CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) argument
34 return 0x00011800B0001028ull + ((offset) + (block_id) * 0x20000ull) * 1024;
36 return 0x00011800B0001028ull + ((offset) + (block_id) * 0x20000ull) * 1024;
39 return 0x00011800B0001028ull + ((offset) + (block_id) * 0x4000ull) * 1024;
41 return 0x00011800B0001028ull + ((offset) + (block_id) *
44 CVMX_PCSX_ANX_LP_ABIL_REG(unsigned long offset, unsigned long block_id) argument
60 CVMX_PCSX_ANX_RESULTS_REG(unsigned long offset, unsigned long block_id) argument
76 CVMX_PCSX_INTX_EN_REG(unsigned long offset, unsigned long block_id) argument
92 CVMX_PCSX_INTX_REG(unsigned long offset, unsigned long block_id) argument
108 CVMX_PCSX_LINKX_TIMER_COUNT_REG(unsigned long offset, unsigned long block_id) argument
124 CVMX_PCSX_LOG_ANLX_REG(unsigned long offset, unsigned long block_id) argument
142 CVMX_PCSX_MISCX_CTL_REG(unsigned long offset, unsigned long block_id) argument
158 CVMX_PCSX_MRX_CONTROL_REG(unsigned long offset, unsigned long block_id) argument
174 CVMX_PCSX_MRX_STATUS_REG(unsigned long offset, unsigned long block_id) argument
190 CVMX_PCSX_RXX_STATES_REG(unsigned long offset, unsigned long block_id) argument
206 CVMX_PCSX_RXX_SYNC_REG(unsigned long offset, unsigned long block_id) argument
224 CVMX_PCSX_SGMX_AN_ADV_REG(unsigned long offset, unsigned long block_id) argument
240 CVMX_PCSX_SGMX_LP_ADV_REG(unsigned long offset, unsigned long block_id) argument
256 CVMX_PCSX_TXX_STATES_REG(unsigned long offset, unsigned long block_id) argument
272 CVMX_PCSX_TX_RXX_POLARITY_REG(unsigned long offset, unsigned long block_id) argument
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H A Dcvmx-bgxx-defs.h12 #define CVMX_BGXX_CMRX_CONFIG(offset, block_id) \
13 (0x00011800E0000000ull + (((offset) & 3) + ((block_id) & 7) * 0x10ull) * 1048576)
14 #define CVMX_BGXX_CMRX_INT(offset, block_id) \
15 (0x00011800E0000020ull + (((offset) & 3) + ((block_id) & 7) * 0x10ull) * 1048576)
16 #define CVMX_BGXX_CMRX_PRT_CBFC_CTL(offset, block_id) \
17 (0x00011800E0000408ull + (((offset) & 3) + ((block_id) & 7) * 0x10ull) * 1048576)
18 #define CVMX_BGXX_CMRX_RX_ADR_CTL(offset, block_id) \
19 (0x00011800E00000A0ull + (((offset) & 3) + ((block_id) & 7) * 0x10ull) * 1048576)
20 #define CVMX_BGXX_CMRX_RX_BP_DROP(offset, block_id) \
21 (0x00011800E0000080ull + (((offset) & 3) + ((block_id)
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H A Dcvmx-gserx-defs.h9 #define CVMX_GSERX_DLMX_TX_AMPLITUDE(offset, block_id) (0x0001180090003008ull)
10 #define CVMX_GSERX_DLMX_TX_PREEMPH(offset, block_id) (0x0001180090003028ull)
11 #define CVMX_GSERX_DLMX_MPLL_EN(offset, block_id) (0x0001180090001020ull)
12 #define CVMX_GSERX_DLMX_REF_SSP_EN(offset, block_id) (0x0001180090001048ull)
13 #define CVMX_GSERX_DLMX_TX_RATE(offset, block_id) (0x0001180090003030ull)
14 #define CVMX_GSERX_DLMX_TX_EN(offset, block_id) (0x0001180090003020ull)
15 #define CVMX_GSERX_DLMX_TX_CM_EN(offset, block_id) (0x0001180090003010ull)
16 #define CVMX_GSERX_DLMX_TX_RESET(offset, block_id) (0x0001180090003038ull)
17 #define CVMX_GSERX_DLMX_TX_DATA_EN(offset, block_id) (0x0001180090003018ull)
18 #define CVMX_GSERX_DLMX_RX_RATE(offset, block_id) (
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H A Dcvmx-gmxx-defs.h44 #define CVMX_GMXX_BPID_MAPX(offset, block_id) \
45 (0x0001180008000680ull + (((offset) & 15) + ((block_id) & 7) * 0x200000ull) * 8)
115 unsigned long block_id)
121 return 0x0001180008000580ull + (block_id) * 0x8000000ull;
124 return 0x0001180008000580ull + (block_id) * 0x8000000ull;
126 return 0x0001180008000580ull + (block_id) * 0x1000000ull;
128 return 0x0001180008000580ull + (block_id) * 0x8000000ull;
131 static inline u64 CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) argument
138 return 0x0001180008000010ull + ((offset) + (block_id) * 0x10000ull) * 2048;
141 return 0x0001180008000010ull + ((offset) + (block_id) *
114 CVMX_GMXX_PRTX_CBFC_CTL(unsigned long __attribute__((unused)) offset, unsigned long block_id) argument
158 CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) argument
173 CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) argument
188 CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) argument
203 CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) argument
218 CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) argument
233 CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) argument
248 CVMX_GMXX_RXX_ADR_CAM_ALL_EN(unsigned long offset, unsigned long block_id) argument
263 CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) argument
278 CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) argument
293 CVMX_GMXX_RXX_DECISION(unsigned long offset, unsigned long block_id) argument
308 CVMX_GMXX_RXX_FRM_CHK(unsigned long offset, unsigned long block_id) argument
323 CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) argument
342 CVMX_GMXX_RXX_IFG(unsigned long offset, unsigned long block_id) argument
357 CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) argument
372 CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) argument
387 CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) argument
402 CVMX_GMXX_RXX_PAUSE_DROP_TIME(unsigned long offset, unsigned long block_id) argument
421 CVMX_GMXX_RXX_STATS_CTL(unsigned long offset, unsigned long block_id) argument
436 CVMX_GMXX_RXX_STATS_OCTS(unsigned long offset, unsigned long block_id) argument
451 CVMX_GMXX_RXX_STATS_OCTS_CTL(unsigned long offset, unsigned long block_id) argument
466 CVMX_GMXX_RXX_STATS_OCTS_DMAC(unsigned long offset, unsigned long block_id) argument
481 CVMX_GMXX_RXX_STATS_OCTS_DRP(unsigned long offset, unsigned long block_id) argument
496 CVMX_GMXX_RXX_STATS_PKTS(unsigned long offset, unsigned long block_id) argument
511 CVMX_GMXX_RXX_STATS_PKTS_BAD(unsigned long offset, unsigned long block_id) argument
526 CVMX_GMXX_RXX_STATS_PKTS_CTL(unsigned long offset, unsigned long block_id) argument
541 CVMX_GMXX_RXX_STATS_PKTS_DMAC(unsigned long offset, unsigned long block_id) argument
556 CVMX_GMXX_RXX_STATS_PKTS_DRP(unsigned long offset, unsigned long block_id) argument
571 CVMX_GMXX_RXX_UDD_SKP(unsigned long offset, unsigned long block_id) argument
586 CVMX_GMXX_RX_BP_DROPX(unsigned long offset, unsigned long block_id) argument
601 CVMX_GMXX_RX_BP_OFFX(unsigned long offset, unsigned long block_id) argument
616 CVMX_GMXX_RX_BP_ONX(unsigned long offset, unsigned long block_id) argument
715 CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) argument
774 CVMX_GMXX_TXX_APPEND(unsigned long offset, unsigned long block_id) argument
791 CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) argument
806 CVMX_GMXX_TXX_CBFC_XOFF(unsigned long __attribute__((unused)) offset, unsigned long block_id) argument
823 CVMX_GMXX_TXX_CBFC_XON(unsigned long __attribute__((unused)) offset, unsigned long block_id) argument
842 CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) argument
859 CVMX_GMXX_TXX_MIN_PKT(unsigned long offset, unsigned long block_id) argument
874 CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) argument
889 CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) argument
904 CVMX_GMXX_TXX_PAUSE_TOGO(unsigned long offset, unsigned long block_id) argument
919 CVMX_GMXX_TXX_PAUSE_ZERO(unsigned long offset, unsigned long block_id) argument
936 CVMX_GMXX_TXX_SGMII_CTL(unsigned long offset, unsigned long block_id) argument
952 CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) argument
967 CVMX_GMXX_TXX_SOFT_PAUSE(unsigned long offset, unsigned long block_id) argument
982 CVMX_GMXX_TXX_STAT0(unsigned long offset, unsigned long block_id) argument
997 CVMX_GMXX_TXX_STAT1(unsigned long offset, unsigned long block_id) argument
1012 CVMX_GMXX_TXX_STAT2(unsigned long offset, unsigned long block_id) argument
1027 CVMX_GMXX_TXX_STAT3(unsigned long offset, unsigned long block_id) argument
1042 CVMX_GMXX_TXX_STAT4(unsigned long offset, unsigned long block_id) argument
1057 CVMX_GMXX_TXX_STAT5(unsigned long offset, unsigned long block_id) argument
1072 CVMX_GMXX_TXX_STAT6(unsigned long offset, unsigned long block_id) argument
1087 CVMX_GMXX_TXX_STAT7(unsigned long offset, unsigned long block_id) argument
1102 CVMX_GMXX_TXX_STAT8(unsigned long offset, unsigned long block_id) argument
1117 CVMX_GMXX_TXX_STAT9(unsigned long offset, unsigned long block_id) argument
1132 CVMX_GMXX_TXX_STATS_CTL(unsigned long offset, unsigned long block_id) argument
1147 CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) argument
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H A Dcvmx-pexp-defs.h121 #define CVMX_PEXP_NQM_VFX_CQX_HDBL(offset, block_id) \
122 (0x0001450000001004ull + (((offset) & 31) + ((block_id) & 2047) * 0x4000ull) * 8)
128 #define CVMX_PEXP_NQM_VFX_SQX_TDBL(offset, block_id) \
129 (0x0001450000001000ull + (((offset) & 31) + ((block_id) & 2047) * 0x4000ull) * 8)
130 #define CVMX_PEXP_NQM_VFX_VECX_MSIX_ADDR(offset, block_id) \
131 (0x0001450000010000ull + (((offset) & 31) + ((block_id) & 2047) * 0x2000ull) * 16)
132 #define CVMX_PEXP_NQM_VFX_VECX_MSIX_CTL(offset, block_id) \
133 (0x0001450000010008ull + (((offset) & 31) + ((block_id) & 2047) * 0x2000ull) * 16)
137 #define CVMX_PEXP_SLITB_MSIX_MACX_PFX_TABLE_ADDR(offset, block_id) \
138 (0x00011F0000002000ull + ((offset) & 1) * 4096 + ((block_id)
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H A Dcvmx-dtx-defs.h44 #define CVMX_DTX_BGXX_DATX(offset, block_id) \
45 (0x00011800FE700040ull + (((offset) & 1) + ((block_id) & 7) * 0x1000ull) * 8)
46 #define CVMX_DTX_BGXX_ENAX(offset, block_id) \
47 (0x00011800FE700020ull + (((offset) & 1) + ((block_id) & 7) * 0x1000ull) * 8)
48 #define CVMX_DTX_BGXX_SELX(offset, block_id) \
49 (0x00011800FE700000ull + (((offset) & 1) + ((block_id) & 7) * 0x1000ull) * 8)
85 #define CVMX_DTX_FDEQX_DATX(offset, block_id) \
86 (0x00011800FED30040ull + (((offset) & 1) + ((block_id) & 1) * 0x4000ull) * 8)
87 #define CVMX_DTX_FDEQX_ENAX(offset, block_id) \
88 (0x00011800FED30020ull + (((offset) & 1) + ((block_id)
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H A Dcvmx-asxx-defs.h28 #define CVMX_ASXX_RX_CLK_SETX(offset, block_id) \
29 (0x00011800B0000020ull + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8)
35 #define CVMX_ASXX_TX_CLK_SETX(offset, block_id) \
36 (0x00011800B0000048ull + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8)
38 #define CVMX_ASXX_TX_HI_WATERX(offset, block_id) \
39 (0x00011800B0000080ull + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8)
H A Dcvmx-pki-defs.h32 #define CVMX_PKI_CLX_PKINDX_CFG(offset, block_id) \
33 (0x0001180044300040ull + (((offset) & 63) + ((block_id) & 3) * 0x100ull) * 256)
36 #define CVMX_PKI_CLX_PKINDX_L2_CUSTOM(offset, block_id) \
37 (0x0001180044300058ull + (((offset) & 63) + ((block_id) & 3) * 0x100ull) * 256)
38 #define CVMX_PKI_CLX_PKINDX_LG_CUSTOM(offset, block_id) \
39 (0x0001180044300060ull + (((offset) & 63) + ((block_id) & 3) * 0x100ull) * 256)
40 #define CVMX_PKI_CLX_PKINDX_SKIP(offset, block_id) \
41 (0x0001180044300050ull + (((offset) & 63) + ((block_id) & 3) * 0x100ull) * 256)
42 #define CVMX_PKI_CLX_PKINDX_STYLE(offset, block_id) \
43 (0x0001180044300048ull + (((offset) & 63) + ((block_id)
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H A Dcvmx-ilk-defs.h29 #define CVMX_ILK_RXX_BYTE_CNTX(offset, block_id) \
31 (((offset) & 255) + ((block_id) & 1) * 0x800ull) * 8)
32 #define CVMX_ILK_RXX_CAL_ENTRYX(offset, block_id) \
34 (((offset) & 511) + ((block_id) & 1) * 0x800ull) * 8)
37 #define CVMX_ILK_RXX_CHAX(offset, block_id) \
39 (((offset) & 255) + ((block_id) & 1) * 0x200ull) * 8)
40 #define CVMX_ILK_RXX_CHA_XONX(offset, block_id) \
41 (0x0001180014020400ull + (((offset) & 3) + ((block_id) & 1) * 0x800ull) * 8)
67 #define CVMX_ILK_RXX_PKT_CNTX(offset, block_id) \
69 (((offset) & 255) + ((block_id)
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H A Dcvmx-pemx-defs.h12 static inline u64 CVMX_PEMX_BAR1_INDEXX(unsigned long offset, unsigned long block_id) argument
16 return 0x00011800C0000100ull + ((offset) + (block_id) * 0x200000ull) * 8;
18 return 0x00011800C0000100ull + ((offset) + (block_id) * 0x200000ull) * 8;
21 return 0x00011800C0000100ull + ((offset) + (block_id) * 0x200000ull) * 8;
23 return 0x00011800C0000100ull + ((offset) + (block_id) * 0x200000ull) * 8;
25 return 0x00011800C0000100ull + ((offset) + (block_id) * 0x200000ull) * 8;
31 return 0x00011800C00000A8ull + ((offset) + (block_id) * 0x200000ull) * 8;
33 return 0x00011800C0000100ull + ((offset) + (block_id) * 0x200000ull) * 8;
278 #define CVMX_PEMX_P2P_BARX_END(offset, block_id) \
279 (0x00011800C0000048ull + (((offset) & 3) + ((block_id)
[all...]
H A Dcvmx-sli-defs.h183 #define CVMX_SLI_MACX_PFX_DMA_VF_INT(offset, block_id) \
184 (0x0000000000027280ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)
185 #define CVMX_SLI_MACX_PFX_DMA_VF_INT_ENB(offset, block_id) \
186 (0x0000000000027500ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)
187 #define CVMX_SLI_MACX_PFX_FLR_VF_INT(offset, block_id) \
188 (0x0000000000027400ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)
189 #define CVMX_SLI_MACX_PFX_INT_ENB(offset, block_id) \
190 (0x0000000000027080ull + (((offset) & 1) + ((block_id) & 3) * 0x2ull) * 16)
191 #define CVMX_SLI_MACX_PFX_INT_SUM(offset, block_id) \
192 (0x0000000000027000ull + (((offset) & 1) + ((block_id)
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H A Dcvmx-sso-defs.h115 #define CVMX_SSO_TAQX_WAEX_TAG(offset, block_id) \
116 (0x00016700D0000000ull + (((offset) & 15) + ((block_id) & 2047) * 0x100ull) * 16)
117 #define CVMX_SSO_TAQX_WAEX_WQP(offset, block_id) \
118 (0x00016700D0000008ull + (((offset) & 15) + ((block_id) & 2047) * 0x100ull) * 16)
H A Dcvmx-ciu-defs.h16 #define CVMX_CIU_CIB_LMCX_ENX(offset, block_id) (0x000107000000E300ull)
17 #define CVMX_CIU_CIB_LMCX_RAWX(offset, block_id) (0x000107000000E200ull)
18 #define CVMX_CIU_CIB_OCLAX_ENX(offset, block_id) (0x000107000000EE00ull)
19 #define CVMX_CIU_CIB_OCLAX_RAWX(offset, block_id) (0x000107000000EC00ull)
24 #define CVMX_CIU_CIB_USBDRDX_ENX(offset, block_id) \
25 (0x000107000000EA00ull + ((block_id) & 1) * 0x100ull)
26 #define CVMX_CIU_CIB_USBDRDX_RAWX(offset, block_id) \
27 (0x000107000000E800ull + ((block_id) & 1) * 0x100ull)
/u-boot/include/
H A Dext_common.h150 __le32 block_id; /* Blocks bitmap block */ member in struct:ext2_block_group
/u-boot/test/image/
H A Dspl_load_fs.c99 bg->block_id = cpu_to_le32(block_bitmap_block);
/u-boot/drivers/net/
H A Dsja1105.c269 u64 block_id; member in struct:sja1105_table_header
959 sja1105_packing(buf, &entry->block_id, 31, 24, size, op);
1020 header.block_id = blk_id_map[i];
1042 header.block_id = 0;
/u-boot/fs/ext4/
H A Dext4_common.c158 uint64_t block_nr = le32_to_cpu(bg->block_id);

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