/u-boot/arch/x86/include/asm/arch-apollolake/ |
H A D | pmc.h | 13 pci_dev_t bdf; member in struct:apl_pmc_plat
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H A D | hostbridge.h | 16 * @bdf: Bus/device/function of hostbridge 25 pci_dev_t bdf; member in struct:apl_hostbridge_plat
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H A D | uart.h | 36 void apl_uart_init(pci_dev_t bdf, ulong base);
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/u-boot/arch/x86/cpu/ |
H A D | pci.c | 20 int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, argument 23 outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR); 39 int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, argument 42 outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR); 58 int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set, argument 64 ret = pci_x86_read_config(bdf, offse 75 pci_dev_t bdf; local [all...] |
/u-boot/drivers/pci/ |
H A D | pci_octeontx.c | 91 static bool octeontx_bdf_invalid(pci_dev_t bdf) argument 93 if (PCI_BUS(bdf) == 1 && PCI_DEV(bdf) > 0) 99 static int octeontx_ecam_read_config(const struct udevice *bus, pci_dev_t bdf, argument 107 address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno, 108 PCI_DEV(bdf), PCI_FUNC(bdf), offset); 112 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), siz 117 octeontx_ecam_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 135 octeontx_pem_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 165 octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 198 octeontx2_pem_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 222 octeontx2_pem_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 244 pci_octeontx_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 269 pci_octeontx_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pcie_octeon.c | 27 static bool octeon_bdf_invalid(pci_dev_t bdf, int first_busno) argument 34 if ((PCI_BUS(bdf) == first_busno) && (PCI_DEV(bdf) > 0)) 40 static int pcie_octeon_write_config(struct udevice *bus, pci_dev_t bdf, argument 50 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); 54 busno = PCI_BUS(bdf) - hose->first_busno + 1; 58 cvmx_pcie_config_write8(port, busno, PCI_DEV(bdf), 59 PCI_FUNC(bdf), offse 76 pcie_octeon_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument [all...] |
H A D | pcie_ecam_generic.c | 33 * @bdf: Identifies the PCIe device to access 39 * controller device @pcie and the bus, device & function numbers in @bdf. If 45 pci_dev_t bdf, uint offset, 54 addr += ((PCI_BUS(bdf) - pcie->first_busno) << 16) | 55 (PCI_DEV(bdf) << 11) | (PCI_FUNC(bdf) << 8) | offset; 57 addr += PCIE_ECAM_OFFSET(PCI_BUS(bdf) - pcie->first_busno, 58 PCI_DEV(bdf), PCI_FUNC(bdf), offset); 66 pci_dev_t bdf) 44 pci_generic_ecam_conf_address(const struct udevice *bus, pci_dev_t bdf, uint offset, void **paddress) argument 65 pci_generic_ecam_addr_valid(const struct udevice *bus, pci_dev_t bdf) argument 87 pci_generic_ecam_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 112 pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pcie_plda_common.c | 21 static bool plda_pcie_addr_valid(struct pcie_plda *plda, pci_dev_t bdf) argument 29 if (PCI_BUS(bdf) == plda->sec_busno && PCI_DEV(bdf) > 0) 35 static int plda_pcie_conf_address(const struct udevice *udev, pci_dev_t bdf, argument 39 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf) - dev_seq(udev), 40 PCI_DEV(bdf), PCI_FUNC(bdf), offset); 42 if (!plda_pcie_addr_valid(priv, bdf)) 49 int plda_pcie_config_read(const struct udevice *udev, pci_dev_t bdf, argument 54 bdf, offse 57 plda_pcie_config_write(struct udevice *udev, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pcie_intel_fpga.c | 68 #define IS_ROOT_PORT(pcie, bdf) \ 69 ((PCI_BUS(bdf) == pcie->first_busno) ? true : false) 96 pci_dev_t bdf, int offset) 98 if (IS_ROOT_PORT(pcie, bdf) && PCI_DEV(bdf) == 0 && 99 PCI_FUNC(bdf) == 0 && offset == PCI_BASE_ADDRESS_0) 123 pci_dev_t bdf) 126 if (!IS_ROOT_PORT(pcie, bdf) && !intel_fpga_pcie_link_up(pcie)) 130 if (IS_ROOT_PORT(pcie, bdf) && PCI_DEV(bdf) > 95 intel_fpga_pcie_hide_rc_bar(struct intel_fpga_pcie *pcie, pci_dev_t bdf, int offset) argument 122 intel_fpga_pcie_addr_valid(struct intel_fpga_pcie *pcie, pci_dev_t bdf) argument 200 tlp_cfg_dword_read(struct intel_fpga_pcie *pcie, pci_dev_t bdf, int offset, u8 byte_en, u32 *value) argument 215 tlp_cfg_dword_write(struct intel_fpga_pcie *pcie, pci_dev_t bdf, int offset, u8 byte_en, u32 value) argument 230 intel_fpga_rp_conf_addr(const struct udevice *bus, pci_dev_t bdf, uint offset, void **paddress) argument 240 intel_fpga_pcie_rp_rd_conf(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 248 intel_fpga_pcie_rp_wr_conf(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 280 _pcie_intel_fpga_read_config(struct intel_fpga_pcie *pcie, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 306 _pcie_intel_fpga_write_config(struct intel_fpga_pcie *pcie, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument 330 pcie_intel_fpga_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 352 pcie_intel_fpga_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pci_x86.c | 11 static int _pci_x86_read_config(const struct udevice *bus, pci_dev_t bdf, argument 15 return pci_x86_read_config(bdf, offset, valuep, size); 18 static int _pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, argument 21 return pci_x86_write_config(bdf, offset, value, size);
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H A D | pci_ftpci100.c | 21 static int ftpci100_read_config(const struct udevice *dev, pci_dev_t bdf, argument 29 out_le32(®s->conf, PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset)); 36 static int ftpci100_write_config(struct udevice *dev, pci_dev_t bdf, argument 44 out_le32(®s->conf, PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset));
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H A D | pci_gt64120.c | 46 unsigned char access_type, pci_dev_t bdf, 49 unsigned int bus = PCI_BUS(bdf); 50 unsigned int dev = PCI_DEV(bdf); 51 unsigned int func = PCI_FUNC(bdf); 63 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); 109 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), wher 45 gt_config_access(struct gt64120_pci_controller *gt, unsigned char access_type, pci_dev_t bdf, int where, u32 *data) argument 114 gt64120_pci_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument 131 gt64120_pci_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument [all...] |
H A D | pcie_phytium.c | 67 * @bdf: Identifies the PCIe device to access 73 * controller device @pcie and the bus, device & function numbers in @bdf. If 78 static int pci_phytium_conf_address(const struct udevice *bus, pci_dev_t bdf, argument 85 unsigned int bus_no = PCI_BUS(bdf); 86 unsigned int dev_no = PCI_DEV(bdf); 91 addr += PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), 0); 110 * @bdf: Identifies the PCIe device to access 116 * space of the device identified by the bus, device & function numbers in @bdf 119 pci_phytium_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument 139 pci_phytium_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pcie_layerscape_fixup.c | 190 static int fdt_fixup_pcie_device_ls(void *blob, pci_dev_t bdf, argument 199 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); 207 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); 212 ls_pcie_lut_set_mapping(pcie_rc, index, bdf >> 8, streamid); 214 fdt_pcie_set_msi_map_entry_ls(blob, pcie_rc, bdf >> 8, streamid); 216 fdt_pcie_set_iommu_map_entry_ls(blob, pcie_rc, bdf >> 223 pci_dev_t bdf; member in struct:extra_iommu_entry 465 pci_dev_t bdf; local 503 pci_dev_t bdf; local [all...] |
H A D | pci_msc01.c | 29 unsigned char access_type, pci_dev_t bdf, 35 unsigned int bus = PCI_BUS(bdf); 36 unsigned int dev = PCI_DEV(bdf); 37 unsigned int func = PCI_FUNC(bdf); 62 static int msc01_pci_read_config(const struct udevice *dev, pci_dev_t bdf, argument 68 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &data)) { 78 static int msc01_pci_write_config(struct udevice *dev, pci_dev_t bdf, argument 89 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &old)) 95 msc01_config_access(msc01, PCI_ACCESS_WRITE, bdf, where, &data); 28 msc01_config_access(struct msc01_pci_controller *msc01, unsigned char access_type, pci_dev_t bdf, int where, u32 *data) argument
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H A D | pcie_xilinx.c | 48 * @bdf: Identifies the PCIe device to access 54 * controller device @pcie and the bus, device & function numbers in @bdf. If 61 static int pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf, argument 65 unsigned int bus = PCI_BUS(bdf); 66 unsigned int dev = PCI_DEV(bdf); 67 unsigned int func = PCI_FUNC(bdf); 90 * @bdf: Identifies the PCIe device to access 96 * space of the device identified by the bus, device & function numbers in @bdf 101 static int pcie_xilinx_read_config(const struct udevice *bus, pci_dev_t bdf, argument 106 bdf, offse 123 pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument [all...] |
H A D | pci_common.c | 288 pci_dev_t bdf; local 291 for (bdf = PCI_BDF(busnum, 0, 0); 292 bdf < PCI_BDF(busnum + 1, 0, 0); 293 bdf += PCI_BDF(0, 0, 1)) { 294 if (pci_skip_dev(hose, bdf)) 297 if (!PCI_FUNC(bdf)) { 298 pci_read_config_byte(bdf, PCI_HEADER_TYPE, 306 pci_read_config_word(bdf, PCI_VENDOR_ID, &vendor); 307 pci_read_config_word(bdf, PCI_DEVICE_ID, &device); 313 return bdf; 327 pci_dev_t bdf; local [all...] |
H A D | pci_mpc85xx.c | 18 static int mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf, argument 31 if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && 37 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset); 56 static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, argument 67 if (PCI_BUS(bdf) == 0 && PCI_DEV(bdf) [all...] |
/u-boot/arch/x86/include/asm/ |
H A D | p2sb.h | 15 pci_dev_t bdf; member in struct:p2sb_plat
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H A D | pci.h | 25 * @bdf: PCI device address: bus, device and function -see PCI_BDF() 31 int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, 39 * @bdf: PCI device address: bus, device and function -see PCI_BDF() 45 int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, 54 * @bdf: PCI device address: bus, device and function -see PCI_BDF() 60 int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set,
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H A D | irq.h | 53 u32 bdf; member in struct:irq_router 60 int bdf; member in struct:pirq_routing
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H A D | acpi_table.h | 141 * @bdf: PCI device to add 144 int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf); 152 * @bdf: PCI device to add 155 int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf); 162 * @bdf: PCI device to add 166 pci_dev_t bdf); 176 * @bdf: PCI device to add 180 pci_dev_t bdf);
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/u-boot/board/theadorable/ |
H A D | theadorable.c | 259 pci_dev_t bdf; local 268 bdf = pci_find_device(PCI_VENDOR_ID_PLX, 0x8619, 0); 269 if (bdf == -1) { 349 static int pcie_get_link_speed_width(pci_dev_t bdf, int *speed, int *width) argument 361 ret = dm_pci_bus_find_bdf(bdf, &dev); 369 ven_id, dev_id, PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); 399 pci_dev_t bdf; local 413 bdf [all...] |
/u-boot/arch/x86/cpu/intel_common/ |
H A D | generic_wifi.c | 55 pci_dev_t bdf; local 74 bdf = dm_pci_get_bdf(dev); 75 address = (PCI_DEV(bdf) << 16) | PCI_FUNC(bdf);
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/u-boot/arch/x86/cpu/apollolake/ |
H A D | uart.c | 57 void apl_uart_init(pci_dev_t bdf, ulong base) argument 60 pci_x86_write_config(bdf, PCI_BASE_ADDRESS_0, base, PCI_SIZE_32); 63 pci_x86_write_config(bdf, PCI_COMMAND, PCI_COMMAND_MEMORY | 85 apl_uart_init(plat->ns16550.bdf, plat->ns16550.base); 113 ns.bdf = pci_ofplat_get_devfn(dtplat->reg[0]);
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