/u-boot/arch/arm/include/asm/ |
H A D | atomic.h | 27 #define smp_mb__before_atomic_dec() barrier() 28 #define smp_mb__after_atomic_dec() barrier() 29 #define smp_mb__before_atomic_inc() barrier() 30 #define smp_mb__after_atomic_inc() barrier()
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H A D | processor.h | 125 #define cpu_relax() barrier()
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/u-boot/include/linux/ |
H A D | compiler-intel.h | 16 #define barrier() __memory_barrier() macro 17 #define barrier_data(ptr) barrier() 24 /* This should act as an optimization barrier on var. 25 * Given that this compiler does not have inline assembly, a compiler barrier 28 #define OPTIMIZER_HIDE_VAR(var) barrier()
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H A D | compiler-clang.h | 44 #define barrier() __asm__ __volatile__("" : : : "memory") macro
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H A D | compiler.h | 81 /* Optimization barrier */ 82 #ifndef barrier 83 # define barrier() __memory_barrier() macro 87 # define barrier_data(ptr) barrier() 190 barrier(); \ 192 barrier(); \ 228 barrier(); 230 barrier(); 253 * with an explicit memory barrier or atomic instruction that provides the
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H A D | compiler-gcc.h | 17 /* Optimization barrier */ 20 #define barrier() __asm__ __volatile__("": : :"memory") macro 24 * normal barrier(): while gcc behavior gets along with a normal 25 * barrier(), llvm needs an explicit input variable to be assumed 116 * Work it around via a compiler barrier quirk suggested by Jakub Jelinek.
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/u-boot/arch/microblaze/include/asm/ |
H A D | system.h | 127 #define smp_mb() barrier () 128 #define smp_rmb() barrier () 129 #define smp_wmb() barrier ()
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H A D | bitops.h | 61 * clear_bit() doesn't provide any barrier for the compiler. 63 #define smp_mb__before_clear_bit() barrier() 64 #define smp_mb__after_clear_bit() barrier()
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/u-boot/arch/x86/include/asm/ |
H A D | mp.h | 36 * provides a barrier for each AP before calling the callback or the APs 41 * barrier allowing the APs to make further progress. 46 * @barrier: Ensures that the BSP and AP don't run the flight record at the same 55 atomic_t barrier; member in struct:mp_flight_record 65 .barrier = ATOMIC_INIT(barrier_), \
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H A D | bitops.h | 72 * not contain a memory barrier, so if it is used for locking purposes, 83 #define smp_mb__before_clear_bit() barrier() 84 #define smp_mb__after_clear_bit() barrier() 126 * It also implies a memory barrier. 165 * It also implies a memory barrier. 216 * It also implies a memory barrier.
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/u-boot/arch/sh/include/asm/ |
H A D | system.h | 84 * A brief note on ctrl_barrier(), the control register write barrier. 91 * Historically we have only done this type of barrier for the MMUCR, but 106 #define smp_mb() barrier() 107 #define smp_rmb() barrier() 108 #define smp_wmb() barrier() 207 local_irq_restore(flags); /* implies memory barrier */
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H A D | bitops.h | 28 * clear_bit() doesn't provide any barrier for the compiler. 30 #define smp_mb__before_clear_bit() barrier() 31 #define smp_mb__after_clear_bit() barrier()
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/u-boot/arch/mips/include/asm/ |
H A D | system.h | 178 #define smp_mb() barrier() 179 #define smp_rmb() barrier() 180 #define smp_wmb() barrier()
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H A D | processor.h | 105 #define cpu_relax() barrier()
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H A D | bitops.h | 23 * clear_bit() doesn't provide any barrier for the compiler. 25 #define smp_mb__before_clear_bit() barrier() 26 #define smp_mb__after_clear_bit() barrier() 102 * not contain a memory barrier, so if it is used for locking purposes, 167 * It also implies a memory barrier. 218 * It also implies a memory barrier. 270 * It also implies a memory barrier. 365 * not contain a memory barrier, so if it is used for locking purposes, 426 * It also implies a memory barrier. 472 * It also implies a memory barrier [all...] |
H A D | io.h | 58 barrier();
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/u-boot/arch/arm/include/asm/xen/ |
H A D | system.h | 57 /* As test_bit, but with a following memory barrier. */ 64 barrier();
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/u-boot/arch/riscv/lib/ |
H A D | smp.c | 9 #include <asm/barrier.h>
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/u-boot/drivers/misc/ |
H A D | qfw.c | 56 barrier();
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/u-boot/arch/x86/cpu/ |
H A D | mp_init.c | 66 * mp_flight_record->barrier to 1 to allow the APs to executed the record one 210 barrier_wait(&rec->barrier); 516 if (atomic_read(&rec->barrier) == 0) { 528 release_barrier(&rec->barrier);
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/u-boot/drivers/net/ |
H A D | zynq_gem.c | 639 barrier(); 686 barrier(); 720 barrier(); 843 barrier();
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H A D | macb.c | 361 barrier(); 370 barrier(); 446 barrier(); 523 barrier();
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H A D | pcnet.c | 294 barrier();
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/u-boot/drivers/xen/ |
H A D | pvblock.c | 45 int barrier; member in struct:blkfront_info 256 snprintf(path, sizeof(path), "%s/feature-barrier", 258 dev->info.barrier = xenbus_read_integer(path); 408 printf("write barrier error %d\n", status); 512 barrier(); 573 if (dev->info.barrier == 1)
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/u-boot/arch/riscv/include/asm/ |
H A D | io.h | 11 #include <asm/barrier.h>
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