| /u-boot/arch/arm/cpu/armv7/ |
| H A D | cp15.c | 24 void __weak v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, argument
27 asm volatile ("mcr p15, 0, %0, c1, c0, 1\n\t" : : "r"(acr));
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| /u-boot/arch/arm/mach-socfpga/include/mach/ |
| H A D | scu.h | 18 u32 acr; /* 0x50 */ member in struct:scu_registers
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| /u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | spl_minimal.c | 37 im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) |
43 im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) |
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| H A D | cpu_init.c | 148 clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val);
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| /u-boot/drivers/mtd/ |
| H A D | stm32_flash.h | 2 u32 acr; member in struct:stm32_flash_regs
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| H A D | stm32_flash.c | 21 | FLASH_ACR_DCEN, &STM32_FLASH->acr);
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| /u-boot/arch/arm/mach-omap2/omap3/ |
| H A D | board.c | 376 void __weak omap3_set_aux_cr_secure(u32 acr) argument
381 emu_romcode_params.param1 = acr;
396 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, argument
401 omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_ACR, acr);
403 omap3_set_aux_cr_secure(acr);
406 asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
413 u32 acr; local
416 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
417 acr &= ~clear_bits;
418 acr |
[all...] |
| /u-boot/drivers/i2c/ |
| H A D | at91_i2c.h | 46 u32 acr; member in struct:at91_i2c_regs
|
| /u-boot/arch/arm/include/asm/arch-omap3/ |
| H A D | sys_proto.h | 63 void omap3_set_aux_cr_secure(u32 acr);
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| /u-boot/arch/arm/include/asm/ |
| H A D | armv7.h | 157 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| H A D | hwinit.c | 466 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, argument
478 acr &= ~((0x3 << 23) | (0x3 << 25));
480 omap_smc1(OMAP5_SERVICE_ACR_SET, acr);
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| /u-boot/arch/m68k/include/asm/coldfire/ |
| H A D | ssi.h | 26 u32 acr; member in struct:ssi
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| /u-boot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 167 u32 acr; /* Arbiter Configuration Register */ member in struct:arbiter83xx
|