Searched refs:Xil_In32 (Results 1 - 25 of 40) sorted by relevance

12

/u-boot/board/xilinx/zynqmp/
H A Dxil_io.h17 static int Xil_In32(unsigned long addr) function
/u-boot/board/xilinx/zynqmp/zynqmp-a2197-revA/
H A Dpsu_init_gpl.c633 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
638 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
643 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
648 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
653 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
658 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
663 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
668 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
673 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
678 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-g-a2197-00-revA/
H A Dpsu_init_gpl.c633 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
638 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
643 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
648 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
653 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
658 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
663 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
668 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
673 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
678 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-m-a2197-01-revA/
H A Dpsu_init_gpl.c633 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
638 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
643 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
648 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
653 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
658 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
663 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
668 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
673 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
678 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-m-a2197-02-revA/
H A Dpsu_init_gpl.c633 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
638 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
643 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
648 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
653 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
658 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
663 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
668 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
673 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
678 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-m-a2197-03-revA/
H A Dpsu_init_gpl.c633 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
638 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
643 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
648 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
653 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
658 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
663 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
668 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
673 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
678 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-p-a2197-00-revA/
H A Dpsu_init_gpl.c633 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
638 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
643 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
648 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
653 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
658 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
663 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
668 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
673 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
678 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-smk-k24-revA/
H A Dpsu_init_gpl.c15 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
20 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
25 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
30 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
35 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
40 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
45 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
50 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
55 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
60 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-sm-k24-revA/
H A Dpsu_init_gpl.c15 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
20 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
25 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
30 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
35 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
40 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x00000030));
45 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
50 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
55 pll_ctrl_regval = Xil_In32(((0xFD1A0000U) + 0x0000002C));
60 pll_ctrl_regval = Xil_In32(((
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-e-a2197-00-revA/
H A Dpsu_init_gpl.c86 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
107 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
110 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
131 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
135 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
156 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
160 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
181 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
193 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1));
200 Xil_Out32(0xFD407004, (Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-e-a2197-00-revB/
H A Dpsu_init_gpl.c86 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
107 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
110 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
131 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
135 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
156 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
160 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
181 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
193 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1));
200 Xil_Out32(0xFD407004, (Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/avnet-ultra96-rev1/
H A Dpsu_init_gpl.c685 while ((Xil_In32(0xFD080030) & 0x1) != 1)
688 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
690 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
692 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
696 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
704 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
709 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
714 regval = Xil_In32(0xFD070018);
716 regval = Xil_In32(0xFD070018);
718 regval = Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-mini-emmc0/
H A Dpsu_init_gpl.c685 while ((Xil_In32(0xFD080030) & 0x1) != 1)
688 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
690 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
692 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
696 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
704 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
709 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
714 regval = Xil_In32(0xFD070018);
716 regval = Xil_In32(0xFD070018);
718 regval = Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu100-revC/
H A Dpsu_init_gpl.c685 while ((Xil_In32(0xFD080030) & 0x1) != 1)
688 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
690 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
692 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
696 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
704 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
709 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
714 regval = Xil_In32(0xFD070018);
716 regval = Xil_In32(0xFD070018);
718 regval = Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu208-revA/
H A Dpsu_init_gpl.c86 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
107 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
110 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
131 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
135 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
156 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
160 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
181 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
193 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1));
200 Xil_Out32(0xFD407004, (Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu216-revA/
H A Dpsu_init_gpl.c86 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
107 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) & 0xFFFFFF1F));
110 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
131 Xil_Out32(0xFD407004, (Xil_In32(0xFD407004) & 0xFFFFFF1F));
135 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
156 Xil_Out32(0xFD40B004, (Xil_In32(0xFD40B004) & 0xFFFFFF1F));
160 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
181 Xil_Out32(0xFD40F004, (Xil_In32(0xFD40F004) & 0xFFFFFF1F));
193 Xil_Out32(0xFD403004, (Xil_In32(0xFD403004) | 0x1));
200 Xil_Out32(0xFD407004, (Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-smk-k26-revA/
H A Dpsu_init_gpl.c511 while ((Xil_In32(0xFD080030) & 0x1) != 1)
513 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
515 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
517 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
518 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
520 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
524 Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
530 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
534 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
538 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-sm-k26-revA/
H A Dpsu_init_gpl.c511 while ((Xil_In32(0xFD080030) & 0x1) != 1)
513 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
515 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
517 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
518 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
520 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
524 Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
530 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
534 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
538 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu1275-revB/
H A Dpsu_init_gpl.c516 while ((Xil_In32(0xFD080030) & 0x1) != 1)
518 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
520 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
522 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
523 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
525 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
529 Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
535 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
539 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
543 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu102-revA/
H A Dpsu_init_gpl.c647 dpll_divisor = (Xil_In32(0xFD1A0080U) & 0x00003F00U) >> 0x00000008U;
651 while ((Xil_In32(0xFD080030U) & 0x00000001U) != 0x00000001U)
659 while ((Xil_In32(0xFD080030U) & 0x00000001U) != 0x00000001U)
662 while ((Xil_In32(0xFD080030U) & 0x00000001U) != 0x00000001U)
665 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
669 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
674 while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
678 regval = Xil_In32(0xFD080030);
680 regval = Xil_In32(0xFD080030);
692 regval = Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zc1254-revA/
H A Dpsu_init_gpl.c411 while ((Xil_In32(0xFD080030) & 0x1) != 1)
414 pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
415 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
416 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
417 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
418 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
421 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
424 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
428 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
432 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu1275-revA/
H A Dpsu_init_gpl.c411 while ((Xil_In32(0xFD080030) & 0x1) != 1)
414 pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
415 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
416 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
417 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
418 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
421 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
424 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
428 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
432 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-topic-miamimp-xilinx-xdp-v1r1/
H A Dpsu_init_gpl.c753 while ((Xil_In32(0xFD080030) & 0x1) != 1)
755 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
757 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
759 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
761 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
763 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
767 Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
773 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
777 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
781 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu102-rev1.1/
H A Dpsu_init_gpl.c778 while ((Xil_In32(0xFD080030) & 0x1) != 1)
780 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
782 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
784 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
786 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
788 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
792 Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
798 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
802 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
806 while ((Xil_In32(
[all...]
/u-boot/board/xilinx/zynqmp/zynqmp-zcu111-revA/
H A Dpsu_init_gpl.c712 while ((Xil_In32(0xFD080030) & 0x1) != 1)
714 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
716 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
718 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
720 pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000)
722 pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000)
726 Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16));
732 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
736 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
740 while ((Xil_In32(
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