Searched refs:XOR_BASE_ADDR_REG (Results 1 - 5 of 5) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c30 xor_regs_base_backup[ui] = reg_read(XOR_BASE_ADDR_REG(0, ui));
46 reg_write(XOR_BASE_ADDR_REG(0, dram_info->num_cs), base);
72 reg_write(XOR_BASE_ADDR_REG(0, cs_count), base);
91 reg_write(XOR_BASE_ADDR_REG(0, ui), xor_regs_base_backup[ui]);
H A Dxor_regs.h101 #define XOR_BASE_ADDR_REG(unit, win) (MV_XOR_REGS_BASE(unit) + (0x250 + ((win) * 4))) macro
/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.c29 reg_read(XOR_BASE_ADDR_REG(0, ui));
81 reg_write(XOR_BASE_ADDR_REG(0, ui), (u32)base);
100 reg_write(XOR_BASE_ADDR_REG(0, ui),
H A Dxor_regs.h183 #define XOR_BASE_ADDR_REG(unit, win_num) (MV_XOR_REGS_BASE(unit) + \ macro
/u-boot/arch/arm/mach-mvebu/
H A Ddram.c127 xor_base_save = reg_read(XOR_BASE_ADDR_REG(SCRB_XOR_UNIT,
142 reg_write(XOR_BASE_ADDR_REG(SCRB_XOR_UNIT, SCRB_XOR_WIN),
160 reg_write(XOR_BASE_ADDR_REG(SCRB_XOR_UNIT, SCRB_XOR_WIN),

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