Searched refs:TIMING_CFG0_RWT_SHIFT (Results 1 - 5 of 5) sorted by relevance

/u-boot/include/configs/
H A Dcmpcpro.h28 #define CFG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) | \
H A DMPC837XERDB.h69 #define CFG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \
/u-boot/board/keymile/km83xx/
H A Dkm83xx.c52 (0 << TIMING_CFG0_RWT_SHIFT))
86 (0 << TIMING_CFG0_RWT_SHIFT))
/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c37 static const uint TIMING_CFG0_RWT_SHIFT = (31 - 1); variable
584 timing_cfg_0 = read_to_write << TIMING_CFG0_RWT_SHIFT |
/u-boot/include/
H A Dmpc83xx.h962 #define TIMING_CFG0_RWT_SHIFT 30 macro

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