Searched refs:SET_FMAN_ICID_ENTRY (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dls1046_ids.c64 SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
65 SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
66 SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
67 SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
68 SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
69 SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
70 SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
71 SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
72 SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
73 SET_FMAN_ICID_ENTRY(
[all...]
H A Dls1043_ids.c65 SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
66 SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
67 SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
68 SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
69 SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
70 SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
71 SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
72 SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
73 SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
74 SET_FMAN_ICID_ENTRY(
[all...]
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dfsl_icid.h114 #define SET_FMAN_ICID_ENTRY(_port_id, streamid) \ macro

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