Searched refs:REG_TRAINING_DEBUG_3_MASK (Results 1 - 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.c517 reg &= ~(REG_TRAINING_DEBUG_3_MASK);
519 reg &= ~(REG_TRAINING_DEBUG_3_MASK << REG_TRAINING_DEBUG_3_OFFS);
521 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (3 * REG_TRAINING_DEBUG_3_OFFS));
523 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (4 * REG_TRAINING_DEBUG_3_OFFS));
525 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (5 * REG_TRAINING_DEBUG_3_OFFS));
H A Dddr3_axp.h250 #define REG_TRAINING_DEBUG_3_MASK 0x7 macro
H A Dddr3_read_leveling.c664 add &= REG_TRAINING_DEBUG_3_MASK;
720 add &= REG_TRAINING_DEBUG_3_MASK;

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