Searched refs:REG_SDRAM_TIMING_LOW_ADDR (Results 1 - 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_spd.c803 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
812 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
820 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
828 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
836 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
844 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
852 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
861 reg_write(REG_SDRAM_TIMING_LOW_ADDR, reg);
H A Dddr3_axp.h98 #define REG_SDRAM_TIMING_LOW_ADDR 0x1408 macro
H A Dddr3_init.c88 debug_print_reg(REG_SDRAM_TIMING_LOW_ADDR);

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