Searched refs:REG_SDRAM_TIMING_H_R2W_W2R_H_MASK (Results 1 - 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c536 reg &= ~(REG_SDRAM_TIMING_H_R2W_W2R_H_MASK <<
540 reg |= (((trd2wr_wr2rd >> 2) & REG_SDRAM_TIMING_H_R2W_W2R_H_MASK) <<
H A Dddr3_axp.h110 #define REG_SDRAM_TIMING_H_R2W_W2R_H_MASK 0x7 macro

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