Searched refs:REG_PHY_LOCK_MASK_MASK (Results 1 - 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_dfs.c519 reg &= REG_PHY_LOCK_MASK_MASK; /* [11:0] = 0 */
556 reg = (reg_read(REG_PHY_LOCK_MASK_ADDR) & REG_PHY_LOCK_MASK_MASK);
752 reg |= ~REG_PHY_LOCK_MASK_MASK; /* [11:0] = FFF */
1219 reg &= REG_PHY_LOCK_MASK_MASK; /* [11:0] = 0 */
1541 reg |= ~REG_PHY_LOCK_MASK_MASK; /* [11:0] = FFF */
H A Dddr3_axp.h298 #define REG_PHY_LOCK_MASK_MASK 0xFFFFF000 macro

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