Searched refs:REG_DUNIT_CTRL_LOW_ADDR (Results 1 - 7 of 7) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c77 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
80 reg_write(REG_DUNIT_CTRL_LOW_ADDR,
164 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) |
166 reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
500 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
503 reg_write(REG_DUNIT_CTRL_LOW_ADDR,
600 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) |
602 reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
671 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
674 reg_write(REG_DUNIT_CTRL_LOW_ADDR,
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H A Dddr3_dfs.c355 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
359 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
655 reg = (reg_read(REG_DUNIT_CTRL_LOW_ADDR) & 0xFFFFFFE7);
656 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
969 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
975 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
1425 reg = (reg_read(REG_DUNIT_CTRL_LOW_ADDR) & 0xFFFFFFE7) | 0x2;
1432 dfs_reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
H A Dddr3_axp.h93 #define REG_DUNIT_CTRL_LOW_ADDR 0x1404 macro
H A Dddr3_hw_training.c125 reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
H A Dddr3_init.c87 debug_print_reg(REG_DUNIT_CTRL_LOW_ADDR);
H A Dddr3_spd.c795 reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);
/u-boot/arch/arm/mach-mvebu/
H A Ddram.c240 int val = reg_read(REG_DUNIT_CTRL_LOW_ADDR);

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