Searched refs:REG_DRAM_TRAINING_ERROR_OFFS (Results 1 - 4 of 4) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h223 #define REG_DRAM_TRAINING_ERROR_OFFS 30 macro
H A Dddr3_write_leveling.c103 if (reg & (1 << REG_DRAM_TRAINING_ERROR_OFFS)) {
526 if (reg & (1 << REG_DRAM_TRAINING_ERROR_OFFS)) {
H A Dddr3_hw_training.c682 (1 << REG_DRAM_TRAINING_ERROR_OFFS))
H A Dddr3_read_leveling.c91 (1 << REG_DRAM_TRAINING_ERROR_OFFS)) {

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