Searched refs:REG_DDRPHY_APLL_CTRL_ADDR (Results 1 - 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.c402 reg = (reg_read(REG_DDRPHY_APLL_CTRL_ADDR) & ~(1 << 25));
403 reg_write(REG_DDRPHY_APLL_CTRL_ADDR, reg);
H A Dddr3_axp.h370 #define REG_DDRPHY_APLL_CTRL_ADDR 0x18780 macro

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