Searched refs:REG_DDR3_MR0_CS_ADDR (Results 1 - 4 of 4) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_dfs.c471 reg = reg_read(REG_DDR3_MR0_CS_ADDR +
477 dfs_reg_write(REG_DDR3_MR0_CS_ADDR +
1166 reg = reg_read(REG_DDR3_MR0_CS_ADDR +
1175 dfs_reg_write(REG_DDR3_MR0_CS_ADDR +
H A Dddr3_axp.h255 #define REG_DDR3_MR0_CS_ADDR 0x1870 macro
H A Dddr3_hw_training.c133 reg = reg_read(REG_DDR3_MR0_CS_ADDR) >> 2;
H A Dddr3_spd.c1076 reg_write(REG_DDR3_MR0_CS_ADDR +

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