Searched refs:REG_DDR3_MR0_CL_MASK (Results 1 - 2 of 2) sorted by relevance
| /u-boot/drivers/ddr/marvell/axp/ | ||
| H A D | ddr3_axp.h | 256 #define REG_DDR3_MR0_CL_MASK 0x74 macro |
| H A D | ddr3_dfs.c | 473 ~REG_DDR3_MR0_CL_MASK; 1168 ~REG_DDR3_MR0_CL_MASK; |
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