Searched refs:REG_CPU_DIV_CLK_CTRL_0_ADDR (Results 1 - 2 of 2) sorted by relevance
| /u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_dfs.c | 274 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
316 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
335 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
570 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
610 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
629 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
877 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
915 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
934 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
1289 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, re
[all...] |
| H A D | ddr3_axp.h | 352 #define REG_CPU_DIV_CLK_CTRL_0_ADDR 0x18700 macro
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