Searched refs:R8A774B1_CLK_S3D4 (Results 1 - 10 of 10) sorted by relevance

/u-boot/drivers/clk/renesas/
H A Dr8a774b1-cpg-mssr.c93 DEF_FIXED("s3d4", R8A774B1_CLK_S3D4, CLK_S3, 4, 1),
129 DEF_MOD("scif5", 202, R8A774B1_CLK_S3D4),
130 DEF_MOD("scif4", 203, R8A774B1_CLK_S3D4),
131 DEF_MOD("scif3", 204, R8A774B1_CLK_S3D4),
132 DEF_MOD("scif1", 206, R8A774B1_CLK_S3D4),
133 DEF_MOD("scif0", 207, R8A774B1_CLK_S3D4),
145 DEF_MOD("tpu0", 304, R8A774B1_CLK_S3D4),
146 DEF_MOD("scif2", 310, R8A774B1_CLK_S3D4),
198 DEF_MOD("gpio7", 905, R8A774B1_CLK_S3D4),
199 DEF_MOD("gpio6", 906, R8A774B1_CLK_S3D4),
[all...]
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h31 #define R8A774B1_CLK_S3D4 20 macro

Completed in 182 milliseconds