Searched refs:R8A774B1_CLK_S3D2 (Results 1 - 10 of 10) sorted by relevance

/u-boot/drivers/clk/renesas/
H A Dr8a774b1-cpg-mssr.c92 DEF_FIXED("s3d2", R8A774B1_CLK_S3D2, CLK_S3, 2, 1),
124 DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2),
125 DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2),
126 DEF_MOD("tmu1", 124, R8A774B1_CLK_S3D2),
178 DEF_MOD("ehci1", 702, R8A774B1_CLK_S3D2),
179 DEF_MOD("ehci0", 703, R8A774B1_CLK_S3D2),
180 DEF_MOD("hsusb", 704, R8A774B1_CLK_S3D2),
197 DEF_MOD("sata0", 815, R8A774B1_CLK_S3D2),
206 DEF_MOD("can-fd", 914, R8A774B1_CLK_S3D2),
216 DEF_MOD("i2c2", 929, R8A774B1_CLK_S3D2),
[all...]
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h30 #define R8A774B1_CLK_S3D2 19 macro

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