Searched refs:R8A774B1_CLK_CSI0 (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a774b1-cpg-mssr.h50 #define R8A774B1_CLK_CSI0 39 macro
/u-boot/drivers/clk/renesas/
H A Dr8a774b1-cpg-mssr.c112 DEF_DIV6P1("csi0", R8A774B1_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
181 DEF_MOD("csi20", 714, R8A774B1_CLK_CSI0),
182 DEF_MOD("csi40", 716, R8A774B1_CLK_CSI0),

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