Searched refs:PHY_ENABLECLK (Results 1 - 4 of 4) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
H A Drockchip_mipi_dsi.h114 #define PHY_ENABLECLK DSI_HOST_BITS(0x0a0, 1, 2) macro
/u-boot/drivers/video/rockchip/
H A Drk_mipi.c324 rk_mipi_dsi_write(regs, PHY_ENABLECLK, 1);
/u-boot/drivers/video/
H A Ddw_mipi_dsi.c178 #define PHY_ENABLECLK BIT(2) macro
716 dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
/u-boot/drivers/phy/rockchip/
H A Dphy-rockchip-inno-dsidphy.c186 #define PHY_ENABLECLK BIT(2) macro

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