Searched refs:PHYS_SDRAM_1 (Results 1 - 25 of 91) sorted by relevance

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/u-boot/include/configs/
H A Dpe2201.h12 #define PHYS_SDRAM_1 0x80000000 macro
14 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dintegrator-common.h31 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ macro
33 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Ddurian.h12 #define PHYS_SDRAM_1 0x80000000 macro
14 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dmx23evk.h14 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
16 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dmx28evk.h14 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
16 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dmx23_olinuxino.h11 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
13 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dxea.h24 #define PHYS_SDRAM_1 0x40000000 /* Base address */ macro
26 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dhikey960.h16 #define PHYS_SDRAM_1 0x00000000 macro
19 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dbrppt2.h76 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR macro
77 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dstih410-b2260.h13 #define PHYS_SDRAM_1 0x40000000 macro
14 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dthunderx_88xx.h31 #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */ macro
33 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dtegra-common.h34 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 macro
37 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dtotal_compute.h23 #define PHYS_SDRAM_1 0x80000000 macro
27 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dbcmns.h10 #define PHYS_SDRAM_1 V2M_BASE macro
12 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dcorstone1000.h22 #define PHYS_SDRAM_1 (V2M_BASE) macro
25 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dlegoev3.h28 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ macro
50 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
H A Ddragonboard410c.h16 #define PHYS_SDRAM_1 0x80000000 macro
19 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Ddragonboard820c.h16 #define PHYS_SDRAM_1 0x80000000 macro
21 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dorigen.h15 #define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE macro
H A Dhikey.h20 #define PHYS_SDRAM_1 0x00000000 macro
25 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
H A Dkp_imx53.h66 #define PHYS_SDRAM_1 CSD0_BASE_ADDR macro
70 #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
H A Dmx51evk.h108 #define PHYS_SDRAM_1 CSD0_BASE_ADDR macro
111 #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
H A Dmx53ppd.h93 #define PHYS_SDRAM_1 CSD0_BASE_ADDR macro
99 #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
H A Dcm_fx6.h22 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR macro
24 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
/u-boot/arch/arm/mach-imx/mx5/
H A Dmx53_dram.c26 return get_ram_size((void *)PHYS_SDRAM_1, 1 << 30);
31 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30);
39 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
40 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30);

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