1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2016 David Lechner <david@lechnology.com>
4 *
5 * Based on da850evm.h
6 *
7 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
8 *
9 * Based on davinci_dvevm.h. Original Copyrights follow:
10 *
11 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
17/*
18 * SoC Configuration
19 */
20#define CFG_SYS_EXCEPTION_VECTORS_HIGH
21#define CFG_SYS_OSCIN_FREQ		24000000
22#define CFG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
23#define CFG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
24
25/*
26 * Memory Info
27 */
28#define PHYS_SDRAM_1		DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
29#define PHYS_SDRAM_1_SIZE	(64 << 20) /* SDRAM size 64MB */
30#define CFG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
31
32/* memtest start addr */
33
34/* memtest will be run on 16MB */
35
36/*
37 * Serial Driver info
38 */
39#define CFG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
40
41#define CFG_SYS_SPI_CLK		clk_get(DAVINCI_SPI0_CLKID)
42
43/*
44 * U-Boot general configuration
45 */
46
47/*
48 * Linux Information
49 */
50#define LINUX_BOOT_PARAM_ADDR	(PHYS_SDRAM_1 + 0x100)
51#define CFG_EXTRA_ENV_SETTINGS \
52	"bootenvfile=uEnv.txt\0" \
53	"fdtfile=da850-lego-ev3.dtb\0" \
54	"memsize=64M\0" \
55	"filesyssize=10M\0" \
56	"verify=n\0" \
57	"console=ttyS1,115200n8\0" \
58	"bootscraddr=0xC0600000\0" \
59	"fdtaddr=0xC0600000\0" \
60	"loadaddr=0xC0007FC0\0" \
61	"filesysaddr=0xC1180000\0" \
62	"fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \
63	"importbootenv=echo Importing environment...; " \
64		"env import -t ${loadaddr} ${filesize}\0" \
65	"loadbootenv=fatload mmc 0 ${loadaddr} ${bootenvfile}\0" \
66	"mmcargs=setenv bootargs console=${console} root=/dev/mmcblk0p2 rw " \
67		"rootwait ${optargs}\0" \
68	"mmcboot=bootm ${loadaddr}\0" \
69	"flashargs=setenv bootargs initrd=${filesysaddr},${filesyssize} " \
70		"root=/dev/ram0 rw rootfstype=squashfs console=${console} " \
71		"${optargs}\0" \
72	"flashboot=sf probe 0; " \
73		"sf read ${fdtaddr} 0x40000 0x10000; " \
74		"sf read ${loadaddr} 0x50000 0x400000; " \
75		"sf read ${filesysaddr} 0x450000 0xA00000; " \
76		"run fdtfixup; " \
77		"run fdtboot\0" \
78	"loadimage=fatload mmc 0 ${loadaddr} uImage\0" \
79	"loadfdt=fatload mmc 0 ${fdtaddr} ${fdtfile}\0" \
80	"fdtfixup=fdt addr ${fdtaddr}; fdt resize; fdt chosen\0" \
81	"fdtboot=bootm ${loadaddr} - ${fdtaddr}\0" \
82	"loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
83	"bootscript=source ${bootscraddr}\0"
84
85/* additions for new relocation code, must added to all boards */
86#define CFG_SYS_SDRAM_BASE		0xc0000000
87
88#include <asm/arch/hardware.h>
89
90#endif /* __CONFIG_H */
91