Searched refs:PCC3_RBASE (Results 1 - 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-imx/imx8ulp/
H A Dpcc.c99 {PCC3_RBASE, DMA1_MP_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
100 {PCC3_RBASE, DMA1_CH0_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
101 {PCC3_RBASE, DMA1_CH1_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
102 {PCC3_RBASE, DMA1_CH2_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
103 {PCC3_RBASE, DMA1_CH3_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
104 {PCC3_RBASE, DMA1_CH4_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
105 {PCC3_RBASE, DMA1_CH5_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
106 {PCC3_RBASE, DMA1_CH6_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
107 {PCC3_RBASE, DMA1_CH7_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
108 {PCC3_RBASE, DMA1_CH8_PCC3_SLO
[all...]
/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dpcc.c64 {PCC3_RBASE, LPTPM6_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
65 {PCC3_RBASE, LPTPM7_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
66 {PCC3_RBASE, LPI2C6_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
67 {PCC3_RBASE, LPI2C7_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
68 {PCC3_RBASE, LPUART6_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
69 {PCC3_RBASE, LPUART7_PCC3_SLOT, CLKSRC_PER_BUS, PCC_NO_DIV},
70 {PCC3_RBASE, VIU0_PCC3_SLOT, CLKSRC_NO_PCS, PCC_NO_DIV},
71 {PCC3_RBASE, DSI0_PCC3_SLOT, CLKSRC_PER_BUS, PCC_HAS_DIV},
72 {PCC3_RBASE, LCDIF0_PCC3_SLOT, CLKSRC_PER_PLAT, PCC_HAS_DIV},
73 {PCC3_RBASE, MMDC0_PCC3_SLO
[all...]
/u-boot/arch/arm/include/asm/arch-imx8ulp/
H A Dimx-regs.h36 #define PCC3_RBASE 0x292d0000 macro
/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dimx-regs.h146 #define PCC3_RBASE ((AIPS3_BASE + (AIPS3_SLOT_SIZE * PCC3_AIPS3_SLOT))) macro
215 #define LPUART6_PCC_REG (PCC3_RBASE + (4 * LPUART6_PCC3_SLOT))
216 #define LPUART7_PCC_REG (PCC3_RBASE + (4 * LPUART7_PCC3_SLOT))
227 #define MMDC0_PCC_REG (PCC3_RBASE + (4 * MMDC0_PCC3_SLOT))

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