Searched refs:MMU_SECTION_SHIFT (Results 1 - 14 of 14) sorted by relevance

/u-boot/arch/arm/mach-omap2/
H A Domap-cache.c59 u32 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
60 u32 size = bd->bi_dram[bank].size >> MMU_SECTION_SHIFT;
/u-boot/arch/arm/lib/
H A Dcache-cp15.c49 set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); local
70 >> (MMU_SECTION_SHIFT - 1);
71 start = start >> MMU_SECTION_SHIFT;
106 for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
107 i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) +
108 (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT);
121 for (i = 0; i < ((4096ULL * 1024 * 1024) >> MMU_SECTION_SHIFT); i++)
/u-boot/arch/arm/include/asm/
H A Dsystem.h141 #define MMU_SECTION_SHIFT 21 macro
142 #define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
519 MMU_SECTION_SHIFT = 21, /* 2MB */ enumerator in enum:__anon10
521 MMU_SECTION_SHIFT = 20, /* 1MB */
523 MMU_SECTION_SIZE = 1 << MMU_SECTION_SHIFT,
/u-boot/arch/arm/mach-socfpga/
H A Dmisc_arria10.c259 CFG_SYS_INIT_RAM_ADDR >> MMU_SECTION_SHIFT,
270 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
271 size = bd->bi_dram[bank].size >> MMU_SECTION_SHIFT;
/u-boot/drivers/video/
H A Dbcm2835.c39 fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
H A Dmxsfb.c335 fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
H A Dmvebu_lcd.c564 fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
/u-boot/arch/arm/mach-stm32mp/stm32mp1/
H A Dcpu.c80 for (i = start >> MMU_SECTION_SHIFT;
81 i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
84 if (use_lmb && lmb_is_reserved_flags(&lmb, i << MMU_SECTION_SHIFT, LMB_NOMAP))
/u-boot/arch/mips/include/asm/
H A Dsystem.h287 #define MMU_SECTION_SHIFT 20 macro
288 #define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
/u-boot/board/dhelectronics/dh_imx6/
H A Ddh_imx6_spl.c621 set_section_dcache(ROMCP_ARB_BASE_ADDR >> MMU_SECTION_SHIFT, DCACHE_DEFAULT_OPTION);
622 set_section_dcache(IRAM_BASE_ADDR >> MMU_SECTION_SHIFT, DCACHE_DEFAULT_OPTION);
624 for (i = MMDC0_ARB_BASE_ADDR >> MMU_SECTION_SHIFT;
625 i < ((MMDC0_ARB_BASE_ADDR >> MMU_SECTION_SHIFT) +
626 (SZ_1G >> MMU_SECTION_SHIFT));
/u-boot/drivers/video/imx/
H A Dmxc_ipuv3_fb.c633 fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
/u-boot/drivers/net/
H A Dzynq_gem.c845 /* Align bd_space to MMU_SECTION_SHIFT */
846 bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
H A Dmvneta.c1588 bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
H A Dmvpp2.c5266 bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);

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