Searched refs:M8 (Results 1 - 4 of 4) sorted by relevance
| /u-boot/arch/x86/include/asm/arch-braswell/ |
| H A D | gpio.h | 22 M8, enumerator in enum:mode_list
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| /u-boot/board/ti/am57xx/ |
| H A D | mux_data.h | 93 {VIN2A_D2, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d2.uart10_rxd */
94 {VIN2A_D3, (M8 | PIN_OUTPUT)}, /* vin2a_d3.uart10_txd */
95 {VIN2A_D4, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d4.uart10_ctsn */
96 {VIN2A_D5, (M8 | PIN_OUTPUT_PULLUP)}, /* vin2a_d5.uart10_rtsn */
246 {GPMC_A4, (M8 | PIN_INPUT)}, /* P6 UART6_RXD: gpmc_a4.uart6_rxd */
247 {GPMC_A5, (M8 | PIN_OUTPUT)}, /* R9 UART6_TXD: gpmc_a5.uart6_txd */
248 {GPMC_A6, (M8 | PIN_INPUT)}, /* R5 UART6_CTSN: gpmc_a6.uart6_ctsn */
249 {GPMC_A7, (M8 | PIN_OUTPUT)}, /* P5 UART6_RTSN: gpmc_a7.uart6_rtsn */
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| /u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | mux_dra7xx.h | 37 #define M8 8 macro
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| /u-boot/board/intel/cherryhill/ |
| H A D | cherryhill.c | 82 GPIO_PAD_CONF("N08: GPIO_DFX6", NATIVE, M8, NA, NA, NA,
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