Searched refs:M7 (Results 1 - 9 of 9) sorted by relevance

/u-boot/board/lg/sniper/
H A Dsniper.h78 MUX_VAL(CP(GPMC_NCS0), (IDIS | PTD | DIS | M7)) \
86 MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M7)) /* safe_mode */ \
87 MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M7)) \
88 MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M7)) \
89 MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M7)) \
98 MUX_VAL(CP(DSS_PCLK), (IEN | PTD | EN | M7)) /* safe_mode */ \
99 MUX_VAL(CP(DSS_HSYNC), (IEN | PTD | EN | M7)) /* safe_mode */ \
100 MUX_VAL(CP(DSS_VSYNC), (IEN | PTD | EN | M7)) /* safe_mode */ \
101 MUX_VAL(CP(DSS_ACBIAS), (IEN | PTD | EN | M7)) /* safe_mode */ \
108 MUX_VAL(CP(DSS_DATA6), (IEN | PTD | EN | M7)) /* safe_mod
[all...]
/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h21 M7, enumerator in enum:mode_list
/u-boot/arch/arm/include/asm/arch-omap4/
H A Dmux_omap4.h54 #define M7 7 macro
56 #define SAFE_MODE M7
/u-boot/board/beagle/beagle/
H A Dbeagle.h386 MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M7)) /*safe_mode*/\
387 MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M7)) /*safe_mode*/\
388 MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M7)) /*safe_mode*/\
389 MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M7)) /*safe_mode*/\
390 MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M7)) /*safe_mode*/\
391 MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M7)) /*safe_mode*/\
/u-boot/arch/arm/include/asm/arch-omap3/
H A Dmux.h48 #define M7 7 macro
/u-boot/arch/arm/include/asm/arch-omap5/
H A Dmux_dra7xx.h36 #define M7 7 macro
/u-boot/board/ti/am57xx/
H A Dmux_data.h242 {GPMC_A0, (M7 | PIN_INPUT_PULLUP)}, /* P9_19A: R6_GPIO7_3: gpmc_a0.i2c4_scl (Shared with F4_UART10_RTSN) */
243 {GPMC_A1, (M7 | PIN_INPUT_PULLUP)}, /* P9_20A: T9_GPIO7_4: gpmc_a1.i2c4_sda (Shared with D2_UART10_CTSN) */
253 {GPMC_A20, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* M7: gpmc_a20.mmc2_dat5 */
1087 {XREF_CLK3, (M7 | PIN_INPUT)}, /* xref_clk3.hdq0 */
1270 {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* M7: gpmc_a20.mmc2_dat5 */
/u-boot/board/timll/devkit8000/
H A Ddevkit8000.h357 MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/
/u-boot/board/ti/omap3evm/
H A Devm.h392 MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/\

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