Searched refs:LPDDR3 (Results 1 - 12 of 12) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram.h13 LPDDR3 = 6, enumerator in enum:__anon3
/u-boot/drivers/ram/rockchip/
H A Dsdram-px30-lpddr3-detect-333.inc28 .dramtype = LPDDR3,
H A Dsdram_rk3288.c254 case LPDDR3:
323 case LPDDR3:
329 /* DDRMODE select LPDDR3 */
491 if (sdram_params->base.dramtype != LPDDR3)
531 if (sdram_params->base.dramtype != LPDDR3)
662 if (sdram_params->base.dramtype == LPDDR3) {
795 (sdram_params->base.dramtype == LPDDR3 &&
837 if (sdram_params->base.dramtype == LPDDR3) {
876 if (sdram_params->base.dramtype == LPDDR3) {
877 /* LPDDR2/LPDDR3 nee
[all...]
H A Dsdram_px30.c293 if ((sdram_params->base.dramtype == LPDDR3 ||
520 if (sdram_params->base.dramtype == LPDDR3)
521 pctl_write_mr(dram->pctl, 3, 11, 3, LPDDR3);
535 if (sdram_params->base.dramtype == LPDDR3) {
H A Dsdram_common.c26 case LPDDR3:
27 printascii("LPDDR3");
296 } else if (dram_type == LPDDR3 || dram_type == LPDDR2) {
H A Dsdram_rk3188.c432 if (sdram_params->base.dramtype != LPDDR3)
472 if (sdram_params->base.dramtype != LPDDR3)
608 if (sdram_params->base.dramtype == LPDDR3) {
780 if (sdram_params->base.dramtype == LPDDR3) {
788 /* DDR3 and LPDDR3 are always 8 bank, no need detect */
H A Dsdram_rk3066.c417 if (sdram_params->base.dramtype != LPDDR3)
457 if (sdram_params->base.dramtype != LPDDR3)
593 if (sdram_params->base.dramtype == LPDDR3) {
750 if (sdram_params->base.dramtype == LPDDR3) {
760 /* DDR3 and LPDDR3 are always 8 bank, no need to detect. */
H A Dsdram_rv1126.c531 if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4)
770 else if (dramtype == LPDDR3)
1053 if (dramtype == LPDDR3)
1101 } else if (dramtype == LPDDR3) {
1791 if (dramtype == LPDDR3 && mhz <= 400) {
1881 if (dramtype == LPDDR3 && mhz <= 400) {
2091 } else if (dramtype == LPDDR3) {
2409 if (sdram_params->base.dramtype == LPDDR3) {
2410 pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, LPDDR3);
2505 if (dram_type != LPDDR3)
[all...]
H A Dsdram_rk3399.c49 /* LPDDR3 DRAM DS */
372 } else if (params->base.dramtype == LPDDR3) {
374 vref_mode_dq = 0x5; /* LPDDR3 ODT */
427 vref_mode_dq = 0x2; /* LPDDR3 */
625 } else if (params->base.dramtype == LPDDR3) {
1391 } else if (params->base.dramtype == LPDDR3) {
1401 /* ca training(LPDDR4,LPDDR3 support) */
1410 /* write leveling(LPDDR4,LPDDR3,DDR3 support) */
1419 /* read gate training(LPDDR4,LPDDR3,DDR3 support) */
1428 /* read leveling(LPDDR4,LPDDR3,DDR
[all...]
H A Dsdram_rk3328.c225 if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4)
H A Dsdram_rk322x.c223 if (dramtype == LPDDR3)
/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a83t.c145 /* timing parameters for LPDDR3 */
446 #error Unsupported DRAM type, Please set DRAM type (3:DDR3, 7:LPDDR3)

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