Searched refs:L2CSR0_L2REP_MODE (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu_init.c502 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE);
H A Dstart.S804 ori r4, r4, (L2CSR0_L2REP_MODE)@l
/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h512 #define L2CSR0_L2REP_MODE L2CSR0_L2REP_SPLRUAGE macro

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