Searched refs:L2CSR0_L2LFC (Results 1 - 4 of 4) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu_init.c498 out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC);
500 & (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
617 mtspr(SPRN_L2CSR0, (L2CSR0_L2FI|L2CSR0_L2LFC));
618 while (mfspr(SPRN_L2CSR0) & (L2CSR0_L2FI|L2CSR0_L2LFC))
H A Drelease.S265 lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h
266 ori r2,r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@l
H A Dstart.S778 lis r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@h
779 ori r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l
/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h515 #define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */ macro

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