Searched refs:L2CSR0_L2E (Results 1 - 8 of 8) sorted by relevance
| /u-boot/include/configs/ |
| H A D | P2041RDB.h | 41 #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E
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| H A D | kmcent2.h | 136 #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E
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| H A D | T102xRDB.h | 96 #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E
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| H A D | T104xRDB.h | 60 #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E
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| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu_init.c | 502 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE);
629 if (CFG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
630 while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
637 if (l2cache->l2csr0 & L2CSR0_L2E)
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| H A D | start.S | 228 lis r2, L2CSR0_L2E@h
229 ori r2, r2, L2CSR0_L2E@l
248 lis r2, L2CSR0_L2E@h
249 ori r2, r2, L2CSR0_L2E@l
803 lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
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| H A D | release.S | 285 andis. r1,r3,L2CSR0_L2E@h
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| /u-boot/arch/powerpc/include/asm/ |
| H A D | processor.h | 497 #define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ macro
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