| /u-boot/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 128 #define GPSR3_8 F_(VI1_DATA4, IP6_3_0)
213 #define IP6_3_0 FM(VI1_DATA4) FM(CANFD_CLK_B) F_(0, 0) FM(D7) FM(MMC_D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
279 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
604 PINMUX_IPSR_GPSR(IP6_3_0, VI1_DATA4),
605 PINMUX_IPSR_MSEL(IP6_3_0, CANFD_CLK_B, SEL_CANFD0_1),
606 PINMUX_IPSR_GPSR(IP6_3_0, D7),
607 PINMUX_IPSR_GPSR(IP6_3_0, MMC_D2),
2301 IP6_3_0 ))
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| H A D | pfc-r8a77990.c | 85 #define GPSR0_3 F_(D3, IP6_3_0)
267 #define IP6_3_0 FM(D3) FM(MSIOF3_TXD_A) FM(TX5_C) F_(0, 0) FM(VI5_DATA15_A) FM(DU_DR4) FM(TX4_C) F_(0, 0) FM(LCDOUT20) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
398 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
859 PINMUX_IPSR_GPSR(IP6_3_0, D3),
860 PINMUX_IPSR_GPSR(IP6_3_0, MSIOF3_TXD_A),
861 PINMUX_IPSR_GPSR(IP6_3_0, TX5_C),
862 PINMUX_IPSR_MSEL(IP6_3_0, VI5_DATA15_A, SEL_VIN5_0),
863 PINMUX_IPSR_GPSR(IP6_3_0, DU_DR4),
864 PINMUX_IPSR_GPSR(IP6_3_0, TX4_
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| H A D | pfc-r8a77980.c | 143 #define GPSR3_8 F_(VI1_DATA4, IP6_3_0)
247 #define IP6_3_0 FM(VI1_DATA4) FM(CANFD_CLK_B) F_(0, 0) FM(D7) FM(MMC_D0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
329 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
682 PINMUX_IPSR_GPSR(IP6_3_0, VI1_DATA4),
683 PINMUX_IPSR_MSEL(IP6_3_0, CANFD_CLK_B, SEL_CANFD0_1),
684 PINMUX_IPSR_GPSR(IP6_3_0, D7),
685 PINMUX_IPSR_GPSR(IP6_3_0, MMC_D0),
2755 IP6_3_0 ))
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| H A D | pfc-r8a77995.c | 112 #define GPSR2_11 F_(VI4_DATA10, IP6_3_0)
261 #define IP6_3_0 FM(VI4_DATA10) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
370 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
719 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA10),
720 PINMUX_IPSR_MSEL(IP6_3_0, RX4_A, SEL_SCIF4_0),
2742 IP6_3_0 ))
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| H A D | pfc-r8a77965.c | 98 #define GPSR0_5 F_(D5, IP6_3_0)
311 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
962 PINMUX_IPSR_GPSR(IP6_3_0, D5),
963 PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1),
964 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21),
965 PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5),
5613 IP6_3_0 ))
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| H A D | pfc-r8a77951.c | 92 #define GPSR0_5 F_(D5, IP6_3_0)
305 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
955 PINMUX_IPSR_GPSR(IP6_3_0, D5),
956 PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1),
957 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21),
958 PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5),
5416 IP6_3_0 ))
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| H A D | pfc-r8a7796.c | 98 #define GPSR0_5 F_(D5, IP6_3_0)
311 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
960 PINMUX_IPSR_GPSR(IP6_3_0, D5),
961 PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1),
962 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21),
963 PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5),
5372 IP6_3_0 ))
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