| /u-boot/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 108 #define GPSR2_9 F_(VI0_DATA5, IP4_3_0)
197 #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
279 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
530 PINMUX_IPSR_GPSR(IP4_3_0, VI0_DATA5),
531 PINMUX_IPSR_GPSR(IP4_3_0, HCTS1_N),
532 PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0),
2281 IP4_3_0 ))
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| H A D | pfc-r8a77990.c | 104 #define GPSR1_9 F_(A9, IP4_3_0)
251 #define IP4_3_0 FM(A9) FM(TX5_A) FM(IRQ3) FM(VI4_DATA16) FM(VI5_VSYNC_N_A) FM(DU_DG7) F_(0, 0) F_(0, 0) FM(LCDOUT15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
398 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
734 PINMUX_IPSR_GPSR(IP4_3_0, A9),
735 PINMUX_IPSR_GPSR(IP4_3_0, TX5_A),
736 PINMUX_IPSR_GPSR(IP4_3_0, IRQ3),
737 PINMUX_IPSR_GPSR(IP4_3_0, VI4_DATA16),
738 PINMUX_IPSR_MSEL(IP4_3_0, VI5_VSYNC_N_A, SEL_VIN5_0),
739 PINMUX_IPSR_GPSR(IP4_3_0, DU_DG
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| H A D | pfc-r8a77995.c | 64 #define GPSR1_25 F_(DU_HSYNC, IP4_3_0)
245 #define IP4_3_0 FM(DU_HSYNC) FM(QSTH_QHS) FM(IRQ3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
370 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
663 PINMUX_IPSR_GPSR(IP4_3_0, DU_HSYNC),
664 PINMUX_IPSR_GPSR(IP4_3_0, QSTH_QHS),
665 PINMUX_IPSR_MSEL(IP4_3_0, IRQ3_A, SEL_IRQ_3_0),
2722 IP4_3_0 ))
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| H A D | pfc-r8a77980.c | 123 #define GPSR2_9 F_(VI0_DATA5, IP4_3_0)
231 #define IP4_3_0 FM(VI0_DATA5) FM(HCTS1_N) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
329 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
612 PINMUX_IPSR_GPSR(IP4_3_0, VI0_DATA5),
613 PINMUX_IPSR_GPSR(IP4_3_0, HCTS1_N),
614 PINMUX_IPSR_MSEL(IP4_3_0, TX1_A, SEL_SCIF1_0),
2735 IP4_3_0 ))
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| H A D | pfc-r8a77965.c | 117 #define GPSR1_17 F_(A17, IP4_3_0)
295 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
866 PINMUX_IPSR_GPSR(IP4_3_0, A17),
867 PINMUX_IPSR_GPSR(IP4_3_0, LCDOUT9),
868 PINMUX_IPSR_GPSR(IP4_3_0, VI4_VSYNC_N),
869 PINMUX_IPSR_GPSR(IP4_3_0, DU_DG1),
5593 IP4_3_0 ))
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| H A D | pfc-r8a77951.c | 111 #define GPSR1_17 F_(A17, IP4_3_0)
289 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
859 PINMUX_IPSR_GPSR(IP4_3_0, A17),
860 PINMUX_IPSR_GPSR(IP4_3_0, LCDOUT9),
861 PINMUX_IPSR_GPSR(IP4_3_0, VI4_VSYNC_N),
862 PINMUX_IPSR_GPSR(IP4_3_0, DU_DG1),
5396 IP4_3_0 ))
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| H A D | pfc-r8a7796.c | 117 #define GPSR1_17 F_(A17, IP4_3_0)
295 #define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \
864 PINMUX_IPSR_GPSR(IP4_3_0, A17),
865 PINMUX_IPSR_GPSR(IP4_3_0, LCDOUT9),
866 PINMUX_IPSR_GPSR(IP4_3_0, VI4_VSYNC_N),
867 PINMUX_IPSR_GPSR(IP4_3_0, DU_DG1),
5352 IP4_3_0 ))
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