| /u-boot/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 106 #define GPSR2_11 F_(VI0_DATA7, IP4_11_8)
199 #define IP4_11_8 FM(VI0_DATA7) FM(HRX1) FM(RTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
281 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
538 PINMUX_IPSR_GPSR(IP4_11_8, VI0_DATA7),
539 PINMUX_IPSR_GPSR(IP4_11_8, HRX1),
540 PINMUX_IPSR_GPSR(IP4_11_8, RTS1_N),
2279 IP4_11_8
|
| H A D | pfc-r8a77990.c | 102 #define GPSR1_11 F_(A11, IP4_11_8)
253 #define IP4_11_8 FM(A11) FM(SCL6_A) FM(TX3_B) FM(HTX4_C) F_(0, 0) FM(DU_VSYNC) FM(VI4_DATA1_B) F_(0, 0) FM(QSTVA_QVS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
400 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
751 PINMUX_IPSR_GPSR(IP4_11_8, A11),
752 PINMUX_IPSR_MSEL(IP4_11_8, SCL6_A, SEL_I2C6_0),
753 PINMUX_IPSR_GPSR(IP4_11_8, TX3_B),
754 PINMUX_IPSR_GPSR(IP4_11_8, HTX4_C),
755 PINMUX_IPSR_GPSR(IP4_11_8, DU_VSYNC),
756 PINMUX_IPSR_MSEL(IP4_11_8, VI4_DATA1_
[all...] |
| H A D | pfc-r8a77995.c | 62 #define GPSR1_27 F_(DU_DISP, IP4_11_8)
247 #define IP4_11_8 FM(DU_DISP) FM(QSTVB_QVE) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
372 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
671 PINMUX_IPSR_GPSR(IP4_11_8, DU_DISP),
672 PINMUX_IPSR_GPSR(IP4_11_8, QSTVB_QVE),
673 PINMUX_IPSR_MSEL(IP4_11_8, PWM3_B, SEL_PWM3_2),
2720 IP4_11_8
|
| H A D | pfc-r8a77980.c | 121 #define GPSR2_11 F_(VI0_DATA7, IP4_11_8)
233 #define IP4_11_8 FM(VI0_DATA7) FM(HRX1) FM(RTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
331 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
620 PINMUX_IPSR_GPSR(IP4_11_8, VI0_DATA7),
621 PINMUX_IPSR_GPSR(IP4_11_8, HRX1),
622 PINMUX_IPSR_GPSR(IP4_11_8, RTS1_N),
2733 IP4_11_8
|
| H A D | pfc-r8a77965.c | 115 #define GPSR1_19 F_(A19, IP4_11_8)
297 #define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
463 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
876 PINMUX_IPSR_GPSR(IP4_11_8, A19),
877 PINMUX_IPSR_GPSR(IP4_11_8, LCDOUT11),
878 PINMUX_IPSR_GPSR(IP4_11_8, VI4_CLKENB),
879 PINMUX_IPSR_GPSR(IP4_11_8, DU_DG3),
5591 IP4_11_8
|
| H A D | pfc-r8a77951.c | 109 #define GPSR1_19 F_(A19, IP4_11_8)
291 #define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
869 PINMUX_IPSR_GPSR(IP4_11_8, A19),
870 PINMUX_IPSR_GPSR(IP4_11_8, LCDOUT11),
871 PINMUX_IPSR_GPSR(IP4_11_8, VI4_CLKENB),
872 PINMUX_IPSR_GPSR(IP4_11_8, DU_DG3),
5394 IP4_11_8
|
| H A D | pfc-r8a7796.c | 115 #define GPSR1_19 F_(A19, IP4_11_8)
297 #define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
463 FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \
874 PINMUX_IPSR_GPSR(IP4_11_8, A19),
875 PINMUX_IPSR_GPSR(IP4_11_8, LCDOUT11),
876 PINMUX_IPSR_GPSR(IP4_11_8, VI4_CLKENB),
877 PINMUX_IPSR_GPSR(IP4_11_8, DU_DG3),
5350 IP4_11_8
|