| /u-boot/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 52 #define GPSR0_16 F_(DU_DB6, IP2_3_0)
181 #define IP2_3_0 FM(DU_DB6) F_(0, 0) F_(0, 0) FM(A16) FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
270 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
461 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
462 PINMUX_IPSR_GPSR(IP2_3_0, A16),
463 PINMUX_IPSR_GPSR(IP2_3_0, FXR_TXENB_N),
2261 IP2_3_0 ))
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| H A D | pfc-r8a77995.c | 80 #define GPSR1_9 F_(DU_DG1, IP2_3_0)
227 #define IP2_3_0 FM(DU_DG1) FM(LCDOUT9) FM(MSIOF3_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
361 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
599 PINMUX_IPSR_GPSR(IP2_3_0, DU_DG1),
600 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT9),
601 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_SYNC_B, SEL_MSIOF3_1),
2702 IP2_3_0 ))
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| H A D | pfc-r8a77980.c | 54 #define GPSR0_16 F_(DU_DB6, IP2_3_0)
215 #define IP2_3_0 FM(DU_DB6) FM(MSIOF3_RXD) F_(0, 0) FM(A16) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
320 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
541 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
542 PINMUX_IPSR_GPSR(IP2_3_0, MSIOF3_RXD),
543 PINMUX_IPSR_GPSR(IP2_3_0, A16),
2715 IP2_3_0 ))
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| H A D | pfc-r8a77965.c | 133 #define GPSR1_1 F_(A1, IP2_3_0)
277 #define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
751 PINMUX_IPSR_GPSR(IP2_3_0, A1),
752 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
753 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
754 PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
755 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
756 PINMUX_IPSR_MSEL(IP2_3_0, PWM4_
[all...] |
| H A D | pfc-r8a77951.c | 127 #define GPSR1_1 F_(A1, IP2_3_0)
271 #define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
446 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
744 PINMUX_IPSR_GPSR(IP2_3_0, A1),
745 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
746 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
747 PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
748 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
749 PINMUX_IPSR_MSEL(IP2_3_0, PWM4_
[all...] |
| H A D | pfc-r8a7796.c | 133 #define GPSR1_1 F_(A1, IP2_3_0)
277 #define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
749 PINMUX_IPSR_GPSR(IP2_3_0, A1),
750 PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
751 PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
752 PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
753 PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
754 PINMUX_IPSR_MSEL(IP2_3_0, PWM4_
[all...] |
| H A D | pfc-r8a77990.c | 121 #define GPSR2_20 F_(AVB_TXCREFCLK, IP2_3_0)
233 #define IP2_3_0 FM(AVB_TXCREFCLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
389 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
621 PINMUX_IPSR_GPSR(IP2_3_0, AVB_TXCREFCLK),
4819 IP2_3_0 ))
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