/u-boot/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77970.c | 49 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12) 184 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(HRX0) F_(0, 0) FM(A19) FM(IRQ3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 273 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 472 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC), 473 PINMUX_IPSR_GPSR(IP2_15_12, HRX0), 474 PINMUX_IPSR_GPSR(IP2_15_12, A19), 475 PINMUX_IPSR_GPSR(IP2_15_12, IRQ3), 2258 IP2_15_12
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H A D | pfc-r8a77980.c | 51 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12) 218 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(MSIOF3_SS2) FM(GETHER_PHY_INT_B) FM(A19) FM(FXR_TXENA_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 323 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 554 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC), 555 PINMUX_IPSR_GPSR(IP2_15_12, MSIOF3_SS2), 556 PINMUX_IPSR_MSEL(IP2_15_12, GETHER_PHY_INT_B, SEL_GETHER_1), 557 PINMUX_IPSR_GPSR(IP2_15_12, A19), 558 PINMUX_IPSR_GPSR(IP2_15_12, FXR_TXENA_N), 2712 IP2_15_12 [all...] |
H A D | pfc-r8a77990.c | 119 #define GPSR2_22 F_(BS_N, IP2_15_12) 236 #define IP2_15_12 FM(BS_N) FM(PWM0_A) FM(AVB_MAGIC) FM(VI4_CLK) F_(0, 0) FM(TX3_C) F_(0, 0) FM(VI5_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 392 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 627 PINMUX_IPSR_GPSR(IP2_15_12, BS_N), 628 PINMUX_IPSR_MSEL(IP2_15_12, PWM0_A, SEL_PWM0_0), 629 PINMUX_IPSR_GPSR(IP2_15_12, AVB_MAGIC), 630 PINMUX_IPSR_GPSR(IP2_15_12, VI4_CLK), 631 PINMUX_IPSR_GPSR(IP2_15_12, TX3_C), 632 PINMUX_IPSR_MSEL(IP2_15_12, VI5_CLK_ [all...] |
H A D | pfc-r8a77995.c | 77 #define GPSR1_12 F_(DU_DG4, IP2_15_12) 230 #define IP2_15_12 FM(DU_DG4) FM(LCDOUT12) FM(HSCK3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 364 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 610 PINMUX_IPSR_GPSR(IP2_15_12, DU_DG4), 611 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT12), 612 PINMUX_IPSR_MSEL(IP2_15_12, HSCK3_B, SEL_HSCIF3_1), 2699 IP2_15_12
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H A D | pfc-r8a77965.c | 130 #define GPSR1_4 F_(A4, IP2_15_12) 280 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 455 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 772 PINMUX_IPSR_GPSR(IP2_15_12, A4), 773 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20), 774 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), 775 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12), 776 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12), 777 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB [all...] |
H A D | pfc-r8a77951.c | 124 #define GPSR1_4 F_(A4, IP2_15_12) 276 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 449 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 765 PINMUX_IPSR_GPSR(IP2_15_12, A4), 766 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20), 767 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), 768 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12), 769 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12), 770 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB [all...] |
H A D | pfc-r8a7796.c | 130 #define GPSR1_4 F_(A4, IP2_15_12) 280 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro 455 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ 770 PINMUX_IPSR_GPSR(IP2_15_12, A4), 771 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20), 772 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), 773 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12), 774 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12), 775 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB [all...] |