Searched refs:INTER_REGS_BASE (Results 1 - 5 of 5) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
H A Dddr_ml_wrapper.h15 #define INTER_REGS_BASE SOC_REGS_PHY_BASE macro
127 writel(val, INTER_REGS_BASE + addr);
132 return readl(INTER_REGS_BASE + addr);
137 setbits_le32(INTER_REGS_BASE + addr, mask);
142 clrbits_le32(INTER_REGS_BASE + addr, mask);
H A Dmv_ddr_plat.h19 #define INTER_REGS_BASE SOC_REGS_PHY_BASE macro
/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.h123 writel(val, INTER_REGS_BASE + addr);
128 return readl(INTER_REGS_BASE + addr);
133 setbits_le32(INTER_REGS_BASE + addr, mask);
138 clrbits_le32(INTER_REGS_BASE + addr, mask);
H A Dddr3_axp.h80 #define INTER_REGS_BASE SOC_REGS_PHY_BASE macro
H A Dddr3_dfs.c60 writel(val, INTER_REGS_BASE + addr);
65 writel(val, INTER_REGS_BASE + addr);

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