Searched refs:HHI_MPLL_CNTL6 (Results 1 - 4 of 4) sorted by relevance

/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-axg.h84 #define HHI_MPLL_CNTL6 0x294 macro
H A Dclock-g12a.h82 #define HHI_MPLL_CNTL6 0x290 macro
H A Dclock-gx.h79 #define HHI_MPLL_CNTL6 0x294 /* 0xa5 offset in data sheet */ macro
/u-boot/drivers/clk/meson/
H A Dgxbb.c177 MESON_GATE(CLKID_FCLK_DIV3, HHI_MPLL_CNTL6, 28),
178 MESON_GATE(CLKID_FCLK_DIV4, HHI_MPLL_CNTL6, 29),
179 MESON_GATE(CLKID_FCLK_DIV5, HHI_MPLL_CNTL6, 30),
180 MESON_GATE(CLKID_FCLK_DIV7, HHI_MPLL_CNTL6, 31),

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