Searched refs:HHI_MPLL_CNTL6 (Results 1 - 4 of 4) sorted by relevance
/u-boot/arch/arm/include/asm/arch-meson/ |
H A D | clock-axg.h | 84 #define HHI_MPLL_CNTL6 0x294 macro
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H A D | clock-g12a.h | 82 #define HHI_MPLL_CNTL6 0x290 macro
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H A D | clock-gx.h | 79 #define HHI_MPLL_CNTL6 0x294 /* 0xa5 offset in data sheet */ macro
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/u-boot/drivers/clk/meson/ |
H A D | gxbb.c | 177 MESON_GATE(CLKID_FCLK_DIV3, HHI_MPLL_CNTL6, 28), 178 MESON_GATE(CLKID_FCLK_DIV4, HHI_MPLL_CNTL6, 29), 179 MESON_GATE(CLKID_FCLK_DIV5, HHI_MPLL_CNTL6, 30), 180 MESON_GATE(CLKID_FCLK_DIV7, HHI_MPLL_CNTL6, 31),
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